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UNITED STATES

SECURITIES AND EXCHANGE COMMISSION

Washington, D.C. 20549

FORM 10-K

For the fiscal year ended December 31, 2002

or

For the transition period from                                  to                                 

Commission file number: 000-31545

SYNPLICITY, INC.

(Exact name of registrant as specified in its charter)

Registrant’s telephone number, including area code: (408) 215-6000

Securities registered pursuant to Section 12(b) of the Act: None

Securities registered pursuant to Section 12(g) of the Act: Common Stock, no par value

Indicate by check mark whether the registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days.  Yes  x  No  ¨

Indicate by check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of the registrant’s knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K.  x

Indicate by check mark if the registrant is an accelerated filer (as defined in Rule 12b-2 of the Securities Exchange Act of 1934, as amended).  Yes  ¨  No  x

The aggregate market value of the voting stock held by non-affiliates of the registrant, based upon the closing sales price of the Common Stock on June 28, 2002 as reported on the Nasdaq National Market, was approximately $43,975,000. Shares of Common Stock held by each executive officer and director and by each shareholder who owns 5% or more of the outstanding Common Stock have been excluded in that such shareholders may be deemed to be affiliates. This determination of affiliate status is not necessarily a conclusive determination for other purposes.

As of February 28, 2003, the registrant had outstanding 25,701,530 shares of Common Stock.

DOCUMENTS INCORPORATED BY REFERENCE

The Registrant has incorporated by reference into Part III of this Annual Report on Form 10-K portions of its Proxy Statement for its 2003 Annual Meeting of Shareholders.

Table of Contents

SYNPLICITY, INC.

ANNUAL REPORT ON FORM 10-K

FOR THE FISCAL YEAR ENDED DECEMBER 31, 2002

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PART I

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PART I

This Annual Report on Form 10-K, the exhibits hereto and the information incorporated by reference herein contain “forward looking statements” within the meaning of Section 27A of the Securities Act of 1933, as amended (the “Securities Act”) and Section 21E of the Securities Exchange Act of 1934, as amended (the “Exchange Act”), and such forward-looking statements involve risks and uncertainties. When used in this Report, the words “may,” “will,” “should,” “believe,” “expects,” “anticipates,” “estimates” and similar expressions are intended to identify forward looking statements. Such statements are subject to risks and uncertainties that could cause actual results to differ materially from those projected. These risks and uncertainties include those discussed below and those discussed in “Management’s Discussion and Analysis of Financial Condition and Results of Operations” or incorporated by reference herein. Synplicity, Inc. (“we”, “us” or “Synplicity”) undertakes no obligation to publicly release any revisions to these forward looking statements to reflect events or circumstances after the date this Annual Report on Form 10-K is filed with the Securities and Exchange Commission or to reflect the occurrence of unanticipated events.

This Annual Report on Form 10-K, as well as all of our subsequent filings under the Exchange Act, is accessible, free of charge, via our website at www.synplicity.com as soon as reasonably practicable after such reports have been filed with the Securities and Exchange Commission.

ITEM 1.    BUSINESS

Overview

We are a leading provider of software products that enable the rapid and effective design and verification of large, complex semiconductors used in networking and communications, computer and peripheral, consumer, military/aerospace and other electronics systems. Our software products perform essential steps in the process of designing semiconductors that are tailored to perform a specific function including field programmable gate arrays (“FPGAs”) and application specific integrated circuits (“ASICs”). We employ proprietary logic synthesis, physical synthesis and debug technology to simplify, improve and accelerate the design and verification of large complex FPGAs and ASICs. We believe our semiconductor design software products, coupled with our responsive customer support, assist our customers to meet performance goals and decrease the time to market of their electronic systems.

Industry Background

Manufacturers of networking and communications, computer and peripheral, consumer, military/aerospace and other electronics systems employ a wide variety of advanced semiconductors, including FPGAs and ASICs, in their products. Unlike off the shelf standard function semiconductors, FPGAs and ASICs are tailored to perform specific functions defined by electronic product designers. FPGAs are semiconductors that are customized, or programmed, to perform a specific function after the semiconductors are manufactured, whereas ASICs are customized during the manufacturing process.

FPGAs and ASICs are used to implement proprietary intellectual property and to provide the equipment manufacturer’s products with enhanced performance, flexibility and differentiation from those of competitors. FPGAs provide equipment manufacturers with the ability to create and modify semiconductor designs quickly and easily. With FPGAs, electronics manufacturers can make changes to the design even after the customer uses the product. This ease of creation and modification helps electronics manufacturers meet time to market requirements by shortening development times. In this respect, FPGAs provide electronic equipment manufacturers the ability to get to market quickly and the flexibility to update their products to address rapidly changing industry and interoperability standards. ASICs, on the other hand, can achieve higher performance, lower power consumption and lower unit cost than FPGAs when produced in volume. However, ASICs generally have longer development cycles as well as lengthy and expensive custom fabrication processes prior to shipment.

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We believe that the relative ease of use, design flexibility and shortened time to market of FPGAs and the expanded capacity, performance and lower power consumption and unit cost of ASICs will continue to fuel growth in the use of these semiconductors in electronic equipment.

The capacity of FPGAs and ASICs on average has increased due to advanced manufacturing processes. In addition, these manufacturing capacity increases help improve performance, lower overall part costs and further expand the breadth of applications for which FPGA and ASIC semiconductors can be used.

Challenges of designing FPGAs and ASICs

As more complex FPGAs and ASICs with higher capacity are used in the design of electronic equipment, these FPGAs and ASICs often require significant resources to design and test their functionality. Large semiconductor designs require more time to develop and test, which may limit the equipment manufacturer’s ability to get to market quickly.

While state of the art semiconductors are designed to achieve high performance standards, reaching these performance goals can require time-consuming design processes. Electronic product designers seek design solutions that produce high performance designs, increase productivity and are easy to learn and use. To achieve these objectives, electronic product designers, including equipment manufacturers using FPGAs and ASICs, have recognized the advantage of certain software solutions which address critical steps in the development cycle.

To date, these software solutions have focused on several functions in the development cycle including:

Our Solution

Our software solutions improve performance and shorten development times for complex FPGAs and ASICs by simplifying, improving and automating key logic synthesis, physical synthesis, design planning and verification functions. Our products utilize a number of sophisticated mathematical algorithms, electrical engineering techniques and advanced software operations.

A key feature of our products is their ability to generate and display concurrently three views of a semiconductor design—the textual design description, a highly abstract graphical representation of the design description and an optimized, detailed diagram showing the various elements of the semiconductor design. As

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the designer changes the textual description, the changes are automatically reflected in the other two views. These alternate representations aid the designer to manipulate and optimize the design and diagnose problems. Our software products also provide the following features and benefits to our customers and their electronic product designers:

Design goal achievement.    Our products enable designers to design products quickly that meet or exceed their semiconductor performance and capacity utilization goals. Efficient and cost-effective manufacturing of a semiconductor depends on full utilization of the semiconductor’s capacity. Users specify design constraints through our graphical user interface and then use our products to automatically process the design to achieve function, performance and capacity goals. The complex optimization operations that our products perform employ the most advanced features of the target semiconductor and result in a highly optimized design that improves performance of the electronic equipment. As a result, our solutions may also enable designers to use less costly semiconductors to achieve the same performance goals, thus reducing costs.

Accelerated time to market.    Electronic product designers require time efficient solutions. Our products optimize small designs in seconds and large designs in minutes or hours, which we believe is significantly faster than alternative software. Reduced execution time significantly shortens time to market because logic synthesis, physical synthesis and verification are typically performed repeatedly during the design process. In addition, our products allow designers to select an optimal design from various design possibilities in the same amount of time that alternative software would require to evaluate a single solution.

Ease of use.    Our products are designed to be easy to install, learn and use. The user enters only information that is specific to the design. Our products employ complex algorithms, but their sophistication makes the designers’ work simpler. We believe both experienced and novice users value our products because they provide highly optimized designs that require a minimum level of effort as compared with conventional approaches. We believe our solutions’ ease of use and graphical representations make them accessible to a larger group of designers without sacrificing quality of results or achievement of design goals.

Optimal product solutions.    We believe our products provide significant advantages for designing FPGAs and ASICs that contain large numbers of transistors. Our FPGA solutions can implement designs for the largest available FPGAs. Synplify Pro, our leading FPGA synthesis product, enhances electronic product designer productivity as well as the performance for complex designs. Amplify Physical Optimizer is intended specifically for large FPGA designs and incorporates specialized features for optimizing these designs that can improve performance on average by approximately 20%. Certify, our ASIC verification product, include features that enable designers to functionally validate large designs using high-speed prototypes. Without these prototypes, ASIC designers may not be able to test their designs at or near the ASIC’s performance target prior to chip signoff, thus increasing the likelihood of a design error. Our Fortify family of power planning and analysis products helps create and validate that the ASIC’s power network maintains its voltage integrity during design operation. Synplify ASIC is capable of implementing ASIC designs and design blocks as large as two million gates in a single operation, saving time and improving results in these more complex semiconductors.

Comprehensive customer support.    Because of the complex nature of our customers’ design activities, we believe our support services are valuable to our customers. We emphasize rapid resolution of customer questions by staffing our customer support operation with knowledgeable design engineers. We have provided our customer service organization with sufficient resources to assist our staff in responding to customer problems within 24 hours. We also make available through our web site information regarding support solutions, problem submission and problem status.

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Products

FPGA Solutions

Our software products for use with FPGAs represented approximately 87%, 94% and 93% of our total bookings in 2002, 2001 and 2000, respectively.

Synplify and Synplify Pro Products

In 1995, we introduced Synplify, our logic synthesis product which enables customers to implement their designs in FPGAs quickly and easily. In May 2000, we launched Synplify Pro, our advanced FPGA logic synthesis product incorporating improved productivity features and offering enhanced results. According to Dataquest, a market research firm, Synplicity’s FPGA synthesis products attained a 54% market share in 2001. To perform logic synthesis, our Synplify and Synplify Pro products employ proprietary optimization algorithms, which we call Behavior Extracting Synthesis Technology. Our Synplify and Synplify Pro products take advantage of specialized features provided by the FPGA manufacturers that improve performance for a particular design. Logic synthesis software products transform a high level design specification into a format comprised of logic elements and wires interconnecting those elements that is ready for implementation in a semiconductor. Logic synthesis is a primary determinant of design performance. As a result, logic synthesis has a significant impact on the overall performance of the electronic system in which the FPGA resides. We believe that our Synplify and Synplify Pro products have the industry’s highest performance results on the basis of speed and capacity utilization of the resulting FPGA. In addition, our Synplify Pro product automatically identifies and restructures certain types of control circuits to achieve better performance.

Because logic synthesis is performed multiple times during the design process, the less time synthesis requires, the quicker the engineer can complete the design process. We believe our Synplify and Synplify Pro products have the industry’s fastest run times. We employ algorithms that scale linearly in run time with the size of the design. Small designs can be synthesized in seconds and designs for the newest, largest FPGAs can be synthesized in hours or even minutes. Synplify and Synplify Pro require only the input of readily available design data. This information is entered via a simple to use graphical user interface, which allows designers to specify all design constraints in a single location quickly.

HDL Analyst Product

In 1997, we introduced HDL Analyst, a software product that is available as an option to our Synplify product and is incorporated into most of our other products. A key feature of our HDL Analyst product is its ability to generate and display concurrently three views of a semiconductor design—the textual design description, a highly abstract graphical representation of the design description and an optimized, detailed diagram showing the various elements of the semiconductor design. As the designer changes the textual description, the changes are automatically reflected in the other two views. Our HDL Analyst product enables designers to quickly identify performance bottlenecks and identify other opportunities for improvement.

Amplify Physical Optimizer Product

In March 2000, we introduced Amplify Physical Optimizer, a software product specifically created for designing large, complex FPGAs. The key innovation and differentiating feature of our Amplify Physical Optimizer product is the method by which it uses and improves physical implementation information provided by the designer during the synthesis process to produce a faster design. We believe that Amplify Physical Optimizer is the industry’s first commercially available physical synthesis product for FPGA design. In October 2001, we introduced our second generation of Amplify Physical Optimizer that utilizes Total Optimization Physical Synthesis, or TOPS, which is based on significant new algorithmic developments that produce precise physical placement while performing optimization of logic on critical paths. By performing detailed placement of logic, the TOPS technology is able to achieve even more predictable timing estimations, thus reducing the

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number of iterations required to close on timing. The user provides this physical implementation information through a graphical user interface, and our Amplify Physical Optimizer product utilizes this information to improve design performance by an average of approximately 20%.

We believe Amplify Physical Optimizer improves time to market. Without physical optimizations, users must undertake numerous time-consuming iterations of design, constraint and software option changes in hopes of creating a design that has the desired performance and functionality.

FPGA components are sold in performance grades. An FPGA offering marginally higher performance may cost substantially more than the next lower grade. We believe that our Amplify Physical Optimizer product assists designers to use less expensive components to meet the same design requirements.

As design sizes increase, there is a trend toward group designs of a single FPGA in which portions of the design are allocated to different persons. When the design is assembled, a performance bottleneck may result if the independently designed portions of the semiconductor do not operate smoothly together. Amplify Physical Optimizer has features that assist a group of designers to collaborate on a single, large FPGA design. We believe these features result in collaborative designs that achieve higher performance than would otherwise be possible.

Identify Product

In November 2002, we acquired a key register transfer level (“RTL”) debug product from Bridges2Silicon, Inc. which we introduced under a new Synplicity product name, Identify. This product allows engineers to debug their FPGAs directly from their RTL source code during chip operation. Identify’s efficient method of functional hardware debug helps engineering teams avoid what would otherwise be a tedious and costly debug using hardware analyzers.

We believe that Identify is the only software product that allows FPGA designers and ASIC prototyping designers to functionally debug their hardware directly in their RTL source code. This allows functional verification with RTL designs 10,000 times faster than today’s RTL simulators and enables the use of in-system stimulus for applications-like networking, audio and video and hardware/software designs. Identify allows designers to directly select signals and conditions in their RTL source code for debugging and the results are viewed directly in the RTL source code. The Identify product can also save results in standard VCD format that can be used with most waveform viewers.

ASIC Solutions

Our software products for use with ASICs represented approximately 13%, 6% and 7% of our total bookings in 2002, 2001 and 2000, respectively.

Certify Product

In 1999, we introduced Certify, a software product for the verification of ASICs using prototypes consisting of one or multiple FPGAs. Our Certify product enables design teams to create hardware prototypes early in the design process so that design changes are easier and less costly. Certify also assists customers in verifying that the final system will work as specified, will work with system level software and will meet customer requirements. Customers who use our Certify product to define their prototypes can begin system integration, software verification, chip verification and system verification earlier than other approaches to functional verification. Certify can process multimillion gate designs in a single pass without the complex scripts commonly required by ASIC synthesis products.

Our Certify product is a verification product incorporating synthesis and enabling the user to create prototypes directly from the user’s textual design specification. Our Certify product also incorporates debug

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intellectual property insertion technology which allows insertion of additional hardware for monitoring the behavior of the prototype without changes to the source hardware description language (“HDL”) for the design. FPGA manufacturers Altera Corporation and Xilinx, Inc. also provide their in-circuit logic analyzers for this application. The ability to operate the prototype at or near the speed of the final product can be very important for ASIC verification. Other available approaches, such as logic simulation software, emulation systems or reconfigurable prototyping systems, cannot run at a sufficient performance level for many applications, such as mobile telephony, optical switching or streaming video in real time. Our Certify product enables designers to create FPGA-based prototypes that operate at or near the speed of the final product and at substantially higher frequencies than other available approaches by using our proprietary embedded synthesis technology that optimizes the final prototype performance. Certify achieves high performance for a multi-FPGA semiconductor prototype by optimizing all FPGAs in the prototype simultaneously.

Synplify ASIC Product

In June 2001, we introduced Synplify ASIC, our logic synthesis product for ASIC design. Our Synplify ASIC product offers higher design capacity as demonstrated by its ability to process designs or design blocks up to two million gates in a single compilation and produces better quality of results. The leading competitive offering requires customers to disassemble the design into a large number of smaller blocks, process each of these independently and then reassemble the result. This requires a great deal of extra effort, which is eliminated in the Synplify ASIC synthesis approach. In addition, processing the design as a single entity or as larger block entities reveals further opportunities for optimization, which can improve chip performance and reduce chip costs. Also, we believe our Synplify ASIC product processes designs up to 15 times faster than the leading competitive product, reducing synthesis processing times and boosting designer productivity.

In addition to the ease-of-use advantage afforded by its high capacity, we believe our Synplify ASIC product is also easy to learn. Synplify ASIC employs an intuitive, graphical user interface and incorporates a high degree of automation.

Fortify Products

In July 2002, we acquired key power planning and analysis products from IOTA Technology, Inc. (“IOTA”) which we introduced under a new Synplicity product family name, Fortify. Within this product family are three key products that create and verify an ASIC’s power network for voltage integrity.

PowerPlanner Product.    Fortify PowerPlanner is a unique product that permits the physical designer to experiment with various power grid topologies and gain an early insight into the voltage integrity and potential electromigration issues in the design before complete logic implementation. Pre-synthesis power planning has been proven to correlate very well to post synthesis and physical implementation results, thereby saving the designer costly design iterations late in the design cycle. Upon achievement of a successful power grid, PowerPlanner’s integrated PowerRoute technology can create the final power grid for use by chip implementation place-and-route tools.

RealPower Product.    Fortify RealPower is an accurate post synthesis and physical implementation power grid verification product. It analyzes the voltage integrity by computing the voltage drop (“IR drop”) and performs electromigration analysis, each on the individual library cells using its embedded Dynamic Power Calculator. Significant levels of IR drop can negatively affect chip performance and proper chip operation. Electromigration affects long-term reliability of semiconductors and must be analyzed and corrected prior to chip signoff. The result is a fast engine that can handle detailed physical information and correct reliability and signal integrity issues before they lead to design revisions or field failures.

PowerTime Product.    Fortify PowerTime is a product that measures the performance degradation associated with the IR drop on the individual standard cell level. PowerTime is used to accurately tune the

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standard delay format data with the timing impact of the IR drop which provides the logic designer with a more realistic view of the timing violations and possible race conditions, and ultimately allows for tighter timing margins along with a higher maximum chip operating frequency.

Customer support

Our products are designed to be utilized quickly and effectively by our customers and to minimize the level of support from us for the designer to be productive. Our customers use our products along with design software from semiconductor manufacturers and from other third party design software developers. The overall semiconductor design process is complex, and our customers may seek assistance from us with various aspects of our products’ functionality in their semiconductor design process. We believe that high quality customer support of our customers’ activities is important to the success of our business. We have developed and expect to continue to improve our comprehensive support organization to manage customer accounts. We provide support for our products primarily from our Sunnyvale, California and Bangalore, India locations. In the long term, we plan to expand existing and establish additional support sites outside of the United States to support customers in those markets.

We provide technical support to our customers through maintenance services. Time-based licenses include maintenance services for the duration of their respective terms. For each sale of a perpetual or three-year term license, the first year of maintenance is generally sold with the license. Thereafter, customers may annually elect to renew maintenance. In 2002, the majority of our customers that were receiving maintenance elected to renew their maintenance with us. We price our maintenance service at 15% or 20% of the perpetual list license fee, depending on the product, on a per license basis. Maintenance service provides us with a valuable, ongoing revenue stream.

Although we have recently experienced, and may continue to experience, pressure in our maintenance renewal rate due to the economic downturn, we believe that the majority of our customers will continue to renew maintenance because the rate of innovation in the semiconductor industry, especially with FPGAs, is high, and equipment manufacturers expect us to support the latest components as soon as they are available. Customers paying maintenance receive software updates for new components when we make these updates available. In the past, we have generally issued at least two new updates to our products per year. These frequent releases typically include support for new components and enable our customers to optimize their designs or create prototypes using those components. We work closely with leading FPGA and ASIC manufacturers to incorporate support for new components as quickly as possible.

We generally provide our support via electronic mail, our web site, facsimile and telephone. Our support organization may assist customers with technical support during the customers’ initial product installation and configuration. However, our support organization devotes the majority of its efforts to assisting customers to resolve questions about our products’ functionality that can arise from the customers’ design tasks. Effective execution of these tasks requires highly skilled engineers familiar with our customers’ design tasks as well as familiarity with third party products that may be used by the customer in conjunction with our products. Our support staff consists of engineers with substantial design experience. We generally respond to customer support requests within 24 hours.

Customers

As of December 31, 2002, we had over 1,800 customers distributed over networking and communications, military and aerospace, computer and peripheral, consumer, semiconductor and other general, medical and industrial industries. Of that total, we believe more than 400 were first-time customers in 2002. Our customers often buy licenses for a single location, department or division, and then, based upon the initial success of the products, later expand their use of our products into other parts of their organizations. We believe we can sell our existing products more extensively within our existing customer base and sell them new products as we expand

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our product line. We will continue to pursue enterprise-wide sales as appropriate. In 2002, 2001 and 2000, no end-user customer comprised more than 10% of our revenue.

Marketing and Sales

Marketing

We focus our marketing efforts to create awareness for our products and generate leads for our sales organization. Our strategy is to distinguish our products by their high level of design performance, ease of use and time to market advantages. We employ a wide variety of communication channels to inform customers and potential customers about our products. These channels include our, or our key partners’, web site, print and web advertising, public relations, web based seminars, live seminars, trade shows and electronic mail notification to customers about new product releases.

Sales

We employ a multi-channel approach to sell our products. We license our software products primarily through our direct sales organization, as well as distributors, resellers and other strategic partners.

Direct Sales

Our direct sales efforts target customers who design semiconductors for networking and communications, computer and peripheral, consumer, automotive military/aerospace and other electronics systems. As of December 31, 2002, our direct sales staff consisted of 83 employees based in 19 offices. Direct sales accounted for approximately 87% of our total revenue in 2002, 86% of our total revenue in 2001 and 79% of our total revenue in 2000. Each of our sales teams generally includes a sales manager, applications engineer and inside sales representative for each territory. The direct sales team also relies on distribution and strategic partners for demand creation and leads. Our typical sales cycle varies by product from two weeks to several months, with our ASIC products generally having longer cycles than our FPGA products.

We currently have domestic direct sales offices in or near Sunnyvale, California; San Diego/Newport Beach, California; Woodinville, Washington; Boulder, Colorado; Austin, Texas; Chicago, Illinois; Durham, North Carolina; Bel Air, Maryland; and Andover, Massachusetts. We also have international direct sales/marketing offices in or near Bracknell, United Kingdom; Aix-en-Provence, France; Dornach, Germany; Venray, Netherlands; Stockholm, Sweden; Netanya, Israel; Bangalore, India; Tokyo, Japan; Seoul, South Korea; and Hsinchu City, Taiwan.

Indirect sales

In addition to our direct sales strategy, we have indirect sales channels through distributors and other resellers. Our relationships with distributors help extend our reach to more customers. Distribution is key in either assisting our direct sales staff or by being our sole sales and support representatives in territories that include portions of Europe and Asia. Our international distributors and other resellers typically perform marketing, sales and technical support functions in their respective country or region. We actively train our international distributors in both our products and sales methods. In general, each one may distribute directly to the customer, via other resellers or through a mixture of both channels. Our distributor agreements do not provide for rights of return, stock rotation or price protection for the distributor. Revenue from distribution was approximately 6% of our total revenue in 2002, 9% of our total revenue in 2001 and 14% of our total revenue in 2000. We also generate some revenue through certain FPGA manufacturers as discussed below.

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Strategic Relationships

Our key strategic partners include certain semiconductor manufacturers and their distributors, and electronic design automation software companies, which provide information and interfacing that assist us with the successful development and distribution of our software solutions.

FPGA manufacturers.    These partners work closely with us before each product release to ensure that our design software products perform optimally with their components. We rely on these manufacturers to provide us advance information and answer detailed questions about their components and design software. These partners currently include Actel Corporation, Altera, Lattice Semiconductor Corporation, QuickLogic Corporation and Xilinx. Actel, Lattice and QuickLogic also resell a version of our Synplify product. These reselling relationships provide a strong endorsement of our products, expand our sales channels and serve to introduce our products to a large number of potential customers. They generated approximately 7% of our total revenue in 2002, 5% of our total revenue in 2001 and 7% of our total revenue in 2000.

ASIC manufacturers.    We also maintain close support relationships with other key semiconductor partners who have presence in the ASIC market. These include AMI Semiconductor, LightSpeed Semiconductor, Artisan Components Inc, Chip Express Corporation, Faraday Technology Corporation, Fujitsu Microelectronics, IBM Microelectronics, OKI Electric Industry Co. Ltd. and Virtual Silicon Technology Inc. These ASIC vendors have worked with us to qualify our software into their ASIC design flows. In addition, we have recently announced a development and marketing agreement with NEC Corporation to optimize our Synplify ASIC product for one of their device families.

Semiconductor distributors.    Insight Electronics, Inc. and Arrow Electronics, Inc. refer customers to us and we conduct joint marketing activities with them. These distributors are of high strategic value to us in part because they also distribute the most widely used FPGAs from Xilinx and Altera, respectively.

Electronic design automation (“EDA”) software companies.    We work with EDA software partners to integrate our complementary products with theirs to create a more complete, easier to use set of design solutions for the benefit of our mutual customers. Our EDA software partners include those whose products perform functions such as design entry, simulation, system analysis, hardware prototyping and simulation acceleration hardware. We have agreements with Cadence Design Systems, Inc., under which Cadence resells our Synplify, HDL Analyst and Certify products in combination with some of its products. We resell versions of Cadence’s Affirma simulators bundled with our products. We also have reselling agreements in place with Aldec Corporation under which they resell our Synplify and HDL Analyst products in combination with their own and we resell their simulation and design entry products, respectively. We also have a joint development relationship with Verplex Systems, Inc., an EDA formal verification partner. Under this joint development relationship, in 2002 we introduced a qualified interface between our synthesis products and their formal equivalency checking product.

Technology

We believe our products are easier to use and produce superior results more rapidly than alternative solutions. In addition, our core technology platform enables us to produce innovative products quickly. Selected features of our technology include:

Behavior Extracting Synthesis Technology.    Our products are designed with our proprietary technology to recognize and locate common circuit building blocks within designs and maintain high-level representations of these blocks throughout the synthesis process. Other synthesis products use circuit representations that maintain detailed level representations of the design, but lose important information. By maintaining behavioral information that describes a semiconductor’s function throughout synthesis, we believe our synthesis products make better overall optimizations, which result in better circuit performance.

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Physical synthesis innovations.    Achieving superior performance in large FPGAs and ASICs requires solving specialized problems not encountered in smaller semiconductors. We have submitted applications for patents related to algorithms that solve many of these problems. These algorithms, including our new TOPS algorithms, involve combining synthesis with processes that are normally applied later in the semiconductor design process. This combination is termed physical synthesis, and we believe that we are the first to offer products based on this technology to FPGA designers.

Fast, memory efficient algorithms.    Long run times are a commonly encountered barrier to processing large designs. Because synthesis is performed repeatedly during the design process, fast run times are an important time-to-market determinant. All of the algorithms employed in our products were carefully selected and implemented for fast run times and efficient memory utilization. These algorithms’ run times increase linearly as design size increases, as opposed to nonlinearly with other software products.

Embedded electrical engineering knowledge.    Synthesis and optimization of complex circuits are accomplished through a large collection of algorithms and heuristics. For any given circuit, the application of these algorithms requires many decisions, including which algorithms to use and in what order to apply them. Implementing a synthesis product is considerably easier if the user is required to make these types of decisions. However, this places the burden of understanding the effects of synthesis algorithms on the user and results in a product that is difficult to use. Instead, we build products with a level of automation for making these decisions by embedding a high degree of electrical engineering knowledge in the products so that optimization decisions are performed automatically.

Power distribution design and analysis.    An important aspect of successful design of complex integrated circuits is the design of the power distribution network. We have proprietary technology for the design and implementation of power distribution for integrated circuits as well as technology for the accurate analysis of voltage drop caused by power usage within local sections of the chip.

Prototyping and Debug.    Complex ASIC designs often cannot be adequately verified except with a prototype that operates close to the intended operating speed of the ASIC. We have developed patented technology and products that assist in the implementation of fast prototypes of ASICs, helping the designer implement the ASIC functionality on a set of FPGAs. Once the prototype is in place, understanding the operation of the circuit is often the critical path to success. We have technology and products that help the designer debug a circuit by relating the actual operation of the circuit back to the HDL input used to implement the circuit.

Research and development

We believe that strong product development capabilities are essential to our strategy of enhancing our core technology, developing additional applications and increasing the competitiveness of our product offerings. We have invested significant time and resources in creating a structured process for undertaking all product development projects. This process involves key functional groups within our company and is designed to provide a framework for defining and addressing the steps required to bring product concepts and development projects to market successfully. Our product development strategy emphasizes rapid innovation and product releases.

We have actively recruited key computer engineers and software developers with expertise and degrees in computer science, electrical engineering and other engineering disciplines. As of December 31, 2002, we had 135 employees engaged in research and development activities and related customer support services. Our research and development expenses were $19.0 million in 2002, $19.4 million in 2001 and $13.3 million in 2000.

Intellectual Property

Our software products rely on our internally developed intellectual property and other proprietary rights. We rely primarily on a combination of patent, copyright, trademark and trade secret laws, confidentiality procedures

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and contractual provisions to protect our intellectual property and other proprietary rights. However, we believe that these measures afford only limited protection. We have filed a number of patent applications and to date have been issued six U.S. patents. We license our software products primarily under shrink wrap licenses that are included as part of the product packaging. Shrink wrap licenses are not negotiated with or signed by individual customers, and purport to take effect upon the opening of the product package or use of the software license key. The legal enforceability of shrink wrap licenses is uncertain in many jurisdictions. We also generally enter into confidentiality agreements with our employees and technical consultants. Despite our efforts to protect our proprietary rights, unauthorized parties may attempt to copy aspects of our products or obtain and use information that we regard as proprietary. Policing unauthorized use of our products is difficult and we are unable to determine the extent to which piracy of our software products exists. In addition, the laws of some foreign countries do not protect our proprietary rights as fully as do the laws of the United States.

We are not aware that our products employ technologies that infringe any valid proprietary rights of third parties. We expect that software product developers will increasingly be subject to infringement claims as the number of products and competitors in our industry segment grows and the functionality of products in different industry segments overlaps. From time to time third parties have claimed that our products violate their proprietary rights but none of these claims has resulted in litigation or material expense. Any infringement claims, with or without merit, could:

These royalty or licensing agreements may not be available on terms acceptable to us, if at all.

Competition

We conduct business in the EDA software market that is intensely competitive and rapidly evolving. We face competition primarily from EDA software companies that provide software products and product suites to perform a variety of design and verification functions for all types of semiconductors. We have experienced and expect to continue to experience increased competition from current and potential competitors, many of which have significantly greater financial, technical, marketing and other resources and who aggressively offer enterprise-wide annualized subscription model access of product and product suite licenses. Companies offering competitive products vary in scope and breadth. Our competitors include:

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We believe the principal factors that will draw end customers to a semiconductor design software product, including logic synthesis, physical synthesis and verification products, include:

We believe that we compete favorably on these factors. However, we expect competition in the EDA software market for FPGAs and ASICs to increase significantly as new companies enter the market and current competitors expand their product lines and services. Many of these potential competitors are likely to enjoy substantial competitive advantages, including greater resources that can be devoted to the development, promotion and sale of their products. In addition, these potential competitors may have more established sales channels, greater software development experience and/or greater name recognition.

Employees

As of December 31, 2002, we had 256 employees, of whom 135 were engaged in research and development and related customer support services, 83 in sales, 14 in marketing and 24 in finance, administration and operations. None of our employees is represented by a labor union. We have not experienced any work stoppages and consider our relations with our employees to be good.

Executive Officers

Our officers and their ages as of December 31, 2002 are as follows:

Bernard Aronson has served as our Chief Executive Officer, President and a Director since July 1997. Mr. Aronson also serves as a member of the board of directors of Nassda Corporation, an electronic design automation software company. From February to July 1997, Mr. Aronson served as Senior Vice President and Co-General Manager of the EPIC Technology Group at Synopsys, a semiconductor design software company. From July 1991 to February 1997, Mr. Aronson served as President of EPIC Design Technology, Inc., a semiconductor design software company, and also served as a Director of EPIC from March 1992 to February 1997, until its merger with Synopsys. From March 1990 to August 1991, Mr. Aronson served as Executive Vice President of Zoran Corporation, a semiconductor company. From 1987 to January 1990, he served as President of ICI Array Technology, Inc., a contract assembly company. From 1976 to 1987, Mr. Aronson served as President of Pico Design, Inc., a semiconductor chip design company that he founded and which became a wholly owned

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subsidiary of Motorola in 1979. Mr. Aronson holds a Bachelor of Science degree in Electrical Engineering from the City University of New York.

Kenneth S. McElvain, one of our co-founders, has served as our Chief Technology Officer, Vice President and Director since inception. Mr. McElvain also served as our President from our inception to January 1996, and our Chief Executive Officer from January 1996 to July 1997. From March 1990 to January 1994, Mr. McElvain was a manager of the logic and timing optimization group and chief architect of the AutoLogic logic synthesis product at Mentor Graphics, a semiconductor design software company. From April 1984 to March 1990, Mr. McElvain was a senior member of technical staff and the originator of the AutoLogic logic synthesis product at Silicon Compilers, Inc., an intellectual property and semiconductor design software company that had been acquired by Mentor Graphics. Mr. McElvain holds a Bachelor of Arts degree in Mathematics and a Bachelor of Science degree in Computer Science from Washington State University.

Alisa Yaffa, one of our co-founders, has served as our Chairman of the Board of Directors, Vice President of Intellectual Property and Secretary since March 1997, October 1998 and our inception, respectively. Ms. Yaffa also served as our Chief Executive Officer from our inception to January 1996 and our President from January 1996 to July 1997. From inception to October 1998, Ms. Yaffa served as Chief Financial Officer of our company. Prior to joining our company, Ms. Yaffa served in various technical and marketing roles at Cadence, Mentor Graphics, EDA Systems, Inc., a design framework software company, and VLSI Technology, Inc., a semiconductor manufacturer that was subsequently acquired by Philips Semiconductor. Ms. Yaffa holds a Bachelor of Arts degree in Applied Mathematics and Computer Science from University of California at Berkeley.

Douglas S. Miller has served as our Vice President of Finance and Chief Financial Officer since October 1998. From June 1998 to September 1998, Mr. Miller was a self-employed financial consultant. From April 1997 to May 1998, Mr. Miller served as Vice President and Chief Financial Officer of 3Dlabs, Inc. a graphics semiconductor company. From October 1991 to April 1997, Mr. Miller served as a partner at Ernst & Young LLP, a professional services organization, and from July 1985 to September 1991, Mr. Miller served as a manager at Ernst & Young LLP. Mr. Miller is a certified public accountant. He holds a Bachelor of Science degree in Accounting from Santa Clara University.

Robert J. Erickson has served as our Vice President of Engineering since April 1998. From June 1997 to April 1998, Mr. Erickson was a principal of Vermilion DA, a semiconductor design software consulting firm. From May 1984 to June 1997, Mr. Erickson served in various positions including a director of engineering at Mentor Graphics. Mr. Erickson holds Bachelor of Arts degrees in Physics and Electrical Engineering from Rice University and a Master of Science degree in Electrical Engineering from Stanford University.

Gary Meyers has served as our Vice President of Worldwide Sales since November 1999 and was Vice President of North American Sales from January 1999 to November 1999. Mr. Meyers joined Synplicity in January 1998 as Western Area Sales Manager until January 1999. From 1988 through 1997, Mr. Meyers served in various senior sales and marketing roles at LSI Logic, a semiconductor company, including from 1996 to 1997 as Director of Marketing of the Communications Products Division, and from 1994 to 1996 as Major Account Sales Manager. Mr. Meyers holds a Bachelor of Science degree in Electrical Engineering from the University of Maryland and a Masters of Business Administration degree from the University of California at Los Angeles.

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ITEM 2.    PROPERTIES

Our principal offices are located in a leased 66,212 square foot facility in Sunnyvale, California which house all of our marketing, administration and finance employees, the majority of our research and development and related customer support service employees, and some sales employees. In addition, we lease a 3,900 square foot development, support and sales center in Bangalore, India; a 3,500 square foot sales office in Andover, Massachusetts; a 3,000 square foot sales facility in Tokyo, Japan; a 1,400 square foot sales and development office in Boulder, Colorado; a 1,300 square foot sales office in Austin, Texas; a 1,300 square foot sales and support office in Bracknell, United Kingdom; and a 1,100 square foot sales office in Hsinchu City, Taiwan. We also lease sales or development offices of 1,000 square feet or less, in or near Newport Beach and San Diego, California; Beaverton, Oregon; Woodinville, Washington; Chicago, Illinois; Durham, North Carolina; Bel Air, Maryland; Dornach, Germany; Aix-en-Provence and Montpellier, France; Venray, Netherlands; Stockholm, Sweden; Netanya, Israel; and Seoul, South Korea. The leases for our Sunnyvale, Beaverton, Boulder, Austin, Andover, Woodinville, Munich, Montpellier, Venray, Netanya, Bangalore, Tokyo and Hsinchu City offices are more than 12 months in duration. The rest of our office leases are not more than 12 months in duration. We expect that our current leased facilities will be sufficient for our needs during 2003. However, we may choose to expand certain existing sales offices or establish new ones during the year.

ITEM 3.    LEGAL PROCEEDINGS

We are not currently involved in any material litigation.

ITEM 4.    SUBMISSION OF MATTERS TO A VOTE OF SECURITY HOLDERS

None.

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PART II

PRICE RANGE OF SYNPLICITY COMMON STOCK

Our common stock has been traded on the Nasdaq National Market under the symbol “SYNP” since October 12, 2000. The following table sets forth for the period indicated the high and low sale prices for the common stock, as reported by the Nasdaq National Market.

On December 31, 2002, the last reported sale price of our common stock on the Nasdaq National Market was $3.78 per share. As of February 28, 2003 there were approximately 145 holders of record of our common stock.

DIVIDEND POLICY

To date, we have paid no cash dividends on our common stock, and have no current intentions to do so.

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ITEM 6:    SELECTED CONSOLIDATED FINANCIAL DATA

The selected consolidated financial data below should be read in conjunction with “Management’s Discussion and Analysis of Financial Condition and Results of Operations” and our consolidated financial statements and notes thereto. The selected consolidated statement of operations data for the years ended December 31, 2002, 2001 and 2000, and the selected consolidated balance sheet data as of December 31, 2002 and 2001 are derived from, and are qualified by reference to, the audited consolidated financial statements included elsewhere in this Annual Report on Form 10-K.

The selected consolidated statement of operations data for the years ended December 31, 1999 and 1998 and the selected consolidated balance sheet data as of December 31, 2000, 1999 and 1998 are derived from, and qualified by reference to, audited consolidated financial statements that are not included in this Annual Report on Form 10-K.

The historical results presented below are not necessarily indicative of future results.

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Certain statements in this “Management’s Discussion and Analysis of Financial Condition and Results of Operations” are forward-looking statements. These statements relate to future events or our future financial performance and involve known and unknown risks, uncertainties and other factors that may cause our or our industry’s actual results, levels of activity, performance or achievements to be materially different from any future results, levels of activity, performance or achievements expressed or implied by the forward-looking statements. These risks and other factors include those listed under “Factors Affecting Future Operating Results” and elsewhere in this Annual Report on Form 10-K. In some cases, you can identify forward-looking statements by terminology such as “may,” “will,” “should,” “expects,” “plans,” “anticipates,” “believes,” “estimates,” “predicts,” “potential,” “continue” or the negative of these terms or other comparable terminology. Forward-looking statements include, but are not limited to: the statements under “Overview” regarding our plans for the acquired technology and products; the statements under “Critical Accounting Policies and Estimates” regarding the financial statements included in this Annual Report, the recognition of future revenue from the sale of perpetual and time-based licenses and additional allowances for doubtful accounts; the statements under “Years Ended December 31, 2002 and 2001—Cost of revenue” regarding future cost of revenue; the statements under “Years Ended December 31, 2002 and 2001—Operating expenses” regarding future operating expenses; the statements in the last paragraph under “Liquidity and Capital Resources” concerning the sufficiency of our available resources to meet cash requirements and the factors which will determine our future cash requirements; and the statements in “Factors Affecting Future Operating Results.” These statements are only predictions. Actual events or results may differ materially. In evaluating these statements, you should specifically consider various factors, including the risks outlined under “Factors Affecting Future Operating Results.” These factors or other unforeseen factors may cause our actual results to differ materially from any forward-looking statement.

Although we believe that the expectations reflected in the forward-looking statements are reasonable, we cannot guarantee future results, levels of activity, performance or achievements. Moreover, neither we nor any other person assumes responsibility for the accuracy and completeness of these forward-looking statements. We are under no duty to update any of the forward-looking statements after the date of this Annual Report on Form 10-K to conform our prior statements to actual results.

You should read the following discussion and analysis in conjunction with our financial statements and the related notes thereto included elsewhere in this Annual Report on Form 10-K.

Synplicity, Synplify, HDL Analyst, Certify, Amplify, Synplify Pro, Synplify ASIC and RealPower are registered trademarks of Synplicity, Inc. Physical Optimizer, PowerPlanner, Fortify and Identify are trademarks of Synplicity, Inc. All other names mentioned herein are trademarks or registered trademarks of their respective companies.

Overview

We operate in one segment, the development and licensing of software products that are used in the design and verification of semiconductors. We market and sell our products throughout North America, principally the United States, as well as in Europe, Japan and other parts of Asia. Our revenue from sales outside North America represented approximately 30%, 24% and 21% of our total revenue in 2002, 2001 and 2000, respectively.

Our products include:

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Today, we primarily sell perpetual licenses to use our software products and related maintenance services, therefore our revenue consists of license and maintenance revenue. Maintenance services include unspecified product updates and electronic, internet-based technical support and telephone support. Historically, we have generated the majority of our total revenue from licenses. However, as a result of our growing installed customer base and the decreased level of license revenue recognized, maintenance revenue has increased as a percent of total revenue. We also sell time-based licenses to use our software products, which have represented a growing proportion of total revenue. Time-based licenses include maintenance services for the duration of their respective terms.

In July 2002, we completed the acquisition of certain products and technology from IOTA, which we accounted for as a business acquisition per the guidelines of Emerging Issues Task Force 98-3, Determining Whether a Nonmonetary Transaction Involves Receipt of Productive Assets or of a Business (“EITF 98-3”). The total purchase price was approximately $5.6 million, comprised of $4.1 million in cash, 300,000 shares of our common stock valued at approximately $1.4 million and approximately $100,000 of acquisition-related costs. We acquired signal integrity and power analysis technology, power planning and analysis products, as well as additional deep submicron intellectual property. We sell the acquired PowerPlanner, RealPower and PowerTime products as part of a new Fortify family of power solutions. We plan to incorporate the acquired power analysis technology into our development of next-generation ASIC synthesis and design implementation products.

In November 2002, we completed a product and technology acquisition from Bridges2Silicon, Inc., which we accounted for as an asset acquisition per the guidelines of EITF 98-3. The total purchase price of approximately $2.6 million, comprised of $2.5 million in cash and approximately $100,000 of acquisition-related costs. We acquired Bridges2Silicon’s FPGA RTL debug product, core technology and other intellectual property. We have begun selling the FPGA RTL debug product as our new Identify product and we intend to apply the underlying technology to the development of next-generation RTL debug products.

Critical Accounting Policies and Estimates

Our discussion and analysis of our financial condition and results of operations are based upon our audited consolidated financial statements, which have been prepared in accordance with accounting principles generally accepted in the United States. The preparation of these financial statements requires us to make estimates and judgments that affect the reported amounts of assets, liabilities, revenues, expenses and related disclosure of contingent assets and liabilities. We base our estimates on historical experience and on various other assumptions that are believed to be reasonable under the circumstances, and we evaluate these estimates on an on-going basis. Actual results may differ from these estimates under different assumptions or conditions.

Revenue Recognition

For each sale of a perpetual license, the first year of maintenance is generally sold with the license. We defer the recognition of license and maintenance revenue until:

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Once all of the above conditions have been met, license revenue is recognized based upon the residual method after all elements other than maintenance have been delivered in accordance with AICPA Statement of Position 98-9, Modification of SOP No. 97-2 with Respect to Certain Transactions.

Once the first four of the above conditions have been met, maintenance revenue is recognized ratably over the maintenance period since customers under maintenance agreements receive unspecified product updates and electronic, internet-based technical support and telephone support throughout their maintenance period, which is typically one year. A substantial majority of our customers also purchase maintenance renewals annually, which, depending on the product, we offer at either 15 or 20% of the list price of the specific perpetual product license, and which establishes vendor specific objective evidence (VSOE) of the fair value of maintenance.

We also offer three-year term licenses for certain products under which the customer can purchase the first year of maintenance with the license and can renew maintenance in each of the following two years. Revenue from term licenses is recognized in the same manner as revenue from perpetual licenses as the VSOE of fair value of maintenance is established by the maintenance renewal pricing.

We assess whether the fee is fixed or determinable for sales with payment terms outside of our normal terms based on evaluating our history of collections from these customers and their current financial standing. In no case will we deem a fee to be fixed or determinable where the fee is not due until after the expiration of the license or more than 12 months after delivery. We make judgments as to whether or not collection of the fee is probable based on the analysis provided by our credit review procedures. Revenue on arrangements to end-user customers that have met all the revenue recognition criteria except probability of collection is recognized as collection becomes reasonably assured, which is generally as payments are received. Revenue on sales to distributors and resellers is generally considered to have met the probability of collection criteria when the distributor or reseller has resold the product to an end user and either we have received payment for the product or we assess that we have a substantial and sustained history of collections from them.

We also sell time-based licenses to use our software products for specified periods of time. Time-based licenses include maintenance services for the duration of their respective terms. Revenue from time-based licenses is allocated between license and maintenance revenue in similar proportion to perpetual license transactions, and recognized ratably over the period of the license as we do not have VSOE of the fair value of maintenance since it is not priced or offered separately. In addition, we have provided a version of one of our products to certain FPGA manufacturers for distribution to their customers. As part of these agreements we have certain maintenance and support obligations to the FPGA manufacturers. Revenue on these arrangements is also allocated to license and maintenance revenue and recognized ratably over the period of each arrangement, as we do not have VSOE of the fair value of maintenance since it is not priced or offered separately.

Goodwill and Intangible Assets

Goodwill is not amortized but is tested for impairment using a fair value approach. Goodwill is tested for impairment annually during the fourth quarter as well as whenever indicators of impairment exist. Long-lived assets, including intangible assets, are reviewed whenever events or changes in circumstances indicate that their carrying amount may not be recoverable. Recoverability of a long lived asset other than goodwill is measured by comparison of its carrying amount to the expected future undiscounted cash flows (without interest charges) that the asset is expected to generate. An impairment charge is recorded if the carrying amount of the asset exceeds the sum of the expected undiscounted cash flows. Any impairment to be recognized is measured by the amount

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by which the carrying amount of the asset exceeds its fair value. Fair value is determined based on discounted cash flows or appraised values, depending upon the nature of the assets. Significant management judgment is required in forecasting future operating results and cash flows and, should different conditions prevail or judgments be made, material write-downs of net intangible assets and/or goodwill could occur. In addition, determining the useful life for an intangible asset is a matter of judgment and has an impact on the amount of amortization expense recorded in any given period. Different assumptions about the useful life of an intangible asset would result in more or less amortization expense being recorded in a given period. Our intangible assets are being amortized using the straight-line method over the estimated useful life of five years.

Allowance for Doubtful Accounts

We maintain an allowance for doubtful accounts for estimated losses resulting from the failure of our customers to make required payments. If the financial condition of our customers deteriorates, resulting in an impairment of their ability to make payments, additional allowances may be required.

Valuation Allowance for Deferred Tax Assets

We evaluate the need for a valuation allowance for deferred tax assets in accordance with the requirements of Statement of Financial Accounting Standards No. 109 (“SFAS 109”) and such evaluations require judgment. Our evaluation for the year ending December 31, 2002 was based on the cumulative pre-tax losses we have sustained in the three years ended December 31, 2002.

Results of Operations

The following table sets forth the results of our operations expressed as a percent of total revenue. Our historical operating results are not necessarily indicative of the results for any future period.

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Years Ended December 31, 2002 and 2001

Total revenue

Our total revenue decreased by 7% to $45.6 million for 2002 from $49.2 million for 2001. This decrease was primarily attributable to lower license revenue reflecting the worldwide economic downturn particularly in the United States, partially offset by the increase in maintenance revenue.

License revenue.    License revenue decreased by 20% to $25.8 million for 2002 from $32.1 million for 2001. This decrease was primarily due to lower license sales reflecting the worldwide economic downturn, particularly in the United States, as well as an increase in the percentage of our business from time-based licenses, which reduces near term license revenue as the revenue is recognized over the license period.

Maintenance revenue.    Our maintenance revenue increased by 16% to $19.8 million for 2002 from $17.1 million for 2001, primarily as a result of our growing installed customer base, offset somewhat by lower license sales in 2002 compared to 2001 as well as a lower overall rate of maintenance renewal. Given the lower maintenance renewal rate we have experienced, total maintenance revenue may not increase in 2003 from 2002, or may decline in 2003 or future periods.

Cost of revenue

Cost of license revenue.    Cost of license revenue includes product packaging, software documentation and other costs associated with shipping, as well as royalties due from us to third parties. Our cost of license revenue remained relatively consistent at $227,000 for 2002 and $237,000 for 2001. As a percent of license revenue, the cost of license revenue remained at 1% in 2002 and 2001. We expect that both the cost of license revenue in dollars and the cost of license revenue as a percent of license revenue will not vary significantly in 2003 from 2002.

Cost of maintenance revenue.    Cost of maintenance revenue consists primarily of personnel and other expenses related to providing maintenance support to our customers. Cost of maintenance revenue remained relatively consistent at $1.9 million in 2002 and 2001. As a percent of maintenance revenue, the cost of maintenance revenue decreased to 9% for 2002 from 11% for 2001, primarily due to maintaining similar levels of costs while increasing maintenance revenue. We expect that both the cost of maintenance revenue in dollars and the cost of maintenance revenue as a percent of maintenance revenue will increase during 2003 as we remove certain cost control measures that were put in place in 2002, primarily employee salary reductions.

Amortization of intangible assets.    Amortization of intangible assets of $322,000 during 2002 reflects the amortization of intangible assets acquired as part of our purchases of products and technology from IOTA and Bridges2Silicon over a five-year useful life. We had no amortization of intangible assets in 2001.

Operating expenses

Research and development.    Our research and development expenses decreased 2% to $19.0 million for 2002 from $19.4 million for 2001. This decrease primarily resulted from cost control measures during 2002 including workforce reductions, lower salaries, lower consulting fees and lower recruiting costs, partially offset by personnel and consulting costs associated with the IOTA and Bridges2Silicon product and technology acquisitions. We expect that research and development expenses in 2003 will be higher than 2002 as we remove certain cost control measures that were implemented in 2002, primarily employee salary reductions. As a percent of total revenue, research and development expenses increased to 42% for 2002 from 39% for 2001 due to the decrease in revenue.

Sales and marketing.    Our sales and marketing expenses decreased 7% to $20.1 million for 2002 from $21.5 million for 2001. This decrease was primarily due to lower commissions expense, as well as cost control

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measures including workforce reductions and lower salaries, consulting fees, recruiting costs and advertising activity. We expect that sales and marketing expenses in 2003 will be higher than 2002 as we remove certain cost control measures that were implemented in 2002, primarily employee salary reductions. As a percent of total revenue, sales and marketing expenses remained at 44% for 2002 and 2001.

General and administrative.    Our general and administrative expenses decreased 17% to $4.6 million for 2002 from $5.5 million for 2001. As a percent of total revenue, general and administrative expenses decreased to 10% for 2002 from 11% for 2001. These decreases were primarily the result of lower bad debt expense, as well as cost control measures including workforce reductions, lower salaries, lower consulting fees and lower recruiting costs. We expect that general and administrative expenses in 2003 will be higher than 2002 as we remove certain cost control measures that were implemented in 2002, primarily employee salary reductions, and as we incur higher costs associated with corporate governance compliance.

Stock-based compensation.    Stock-based compensation expense was $542,000 for 2002 and $1.0 million for 2001. Stock-based compensation expense for 2002 related to the following: cost of maintenance revenue of $14,000, research and development expenses of $218,000, sales and marketing expenses of $106,000 and general and administrative expenses of $204,000. Stock-based compensation expense for 2001 related to the following: cost of maintenance revenue of $33,000, research and development expenses of $423,000, sales and marketing expenses of $408,000 and general and administrative expenses of $148,000. The remaining deferred stock-based compensation at December 31, 2002 is expected to be amortized as follows: $455,000 in 2003, $189,000 in 2004, $69,000 in 2005 and $18,000 in 2006. The amount of stock-based compensation expense to be recorded in future periods could decrease if options for which accrued but unvested compensation has been recorded are forfeited.

Acquired in-process research and development.    Acquired in-process research and development expense of $2.8 million during 2002 was incurred in connection with the write off of research and development assets acquired in connection with our product and technology acquisitions during 2002. We had no acquired in-process research and development expense in 2001.

Other income, net

Other income, net decreased 53% to $900,000 for 2002 from $1.9 million for 2001, primarily as a result of the decrease in interest rates available on investments, as well as lower cash and investment balances.

Income Taxes

We recorded an income tax provision of $358,000 for 2002 which primarily represented foreign income taxes. Our provision for income taxes in 2002 differed from the tax benefit that would be derived from applying the federal statutory rate to the loss before taxes primarily due to foreign income taxes and an increase in the valuation allowance for deferred tax assets. We recorded an income tax provision of $304,000 in 2001. Our provision for income taxes in 2001 differed from the tax provision that would be derived from applying the federal statutory rate to the income before taxes primarily due to federal and state minimum taxes, foreign income taxes and non-deductible amortization of deferred stock-based compensation.

As of December 31, 2002, we had deferred tax assets of approximately $9.5 million. Management has evaluated the need for a valuation allowance for deferred tax assets in accordance with the requirements of SFAS 109. Based on the cumulative pre-tax losses we have sustained in the three years ended December 31, 2002, a valuation allowance, in an amount equal to our net deferred tax assets of December 31, 2002, was recorded. The valuation allowance increased by approximately $4.3 million and $1.4 million in 2002 and 2000, respectively and decreased by $1.0 million in 2001.

As of December 31, 2002, we had federal net operating loss carryforwards of approximately $4.5 million. We also had federal and state tax credit carryforwards of approximately $2.4 million and $2.3 million,

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respectively. The federal net operating loss and tax credit carryforwards will expire beginning in 2012, if not utilized. The state tax credits carry forward indefinitely.

Utilization of the net operating loss carryforwards and tax credit carryforwards may be subject to a substantial annual limitation due to the ownership change limitations provided by the Internal Revenue Code of 1986, as amended, and similar state provisions. The annual limitation may result in the expiration of net operating loss carryforwards and tax credit carryforwards before utilization.

Years Ended December 31, 2001 and 2000

Total revenue

Our total revenue increased by 42% to $49.2 million for 2001 from $34.6 million for 2000. This increase was primarily attributable to the release of certain new products which began contributing to revenue in the second quarter of 2000, a stronger direct sales presence internationally and an increase in sales to our existing customers.

License revenue.    License revenue increased by 28% to $32.1 million for 2001 from $25.0 million for 2000. This increase was primarily due to sales of our Amplify and Synplify Pro products which began contributing to revenue in the second quarter of 2000, as well as stronger revenues from Europe and Japan.

Maintenance revenue.    Maintenance revenue increased by 78% to $17.1 million for 2001 from $9.6 million for 2000. This increase was attributable to an increase in perpetual license sales with which we generally sell one year of maintenance support services, offset somewhat by a lower overall rate of maintenance renewal in 2001 compared to 2000.

Cost of revenue

Cost of license revenue.    Our cost of license revenue decreased 4% to $237,000 for 2001 from $246,000 for 2000. Higher costs were incurred in 2000 due to documentation costs for a major product release as well as a greater amount of documentation shipped to customers. As a percent of license revenue, the cost of license revenue decreased to less than 1% for 2001 from 1% for 2000, primarily due to savings achieved in software documentation and shipping costs.

Cost of maintenance revenue.    Cost of maintenance revenue increased 25% to $1.9 million for 2001 from $1.5 million for 2000. This increase was primarily caused by the hiring of additional customer support personnel to provide improved levels of support to a growing installed customer base. As a percent of maintenance revenue, the cost of maintenance revenue decreased to 11% for 2001 from 16% for 2000, primarily due to the increase in maintenance revenue during 2001.

Operating expenses

Research and development.    Our research and development expenses increased 46% to $19.4 million for 2001 from $13.3 million for 2000. This increase was primarily attributable to an increased number of software engineers we employed for the enhancement of existing products and the development of new products. As a percent of total revenue, research and development expenses remained relatively consistent at 39% for 2001 and 2000.

Sales and marketing.    Our sales and marketing expenses increased 18% to $21.5 million for 2001 from $18.3 million for 2000. This increase was primarily due to the expansion of our sales offices, particularly in Japan and other parts of Asia, as well as higher spending on tradeshows and public relations. As a percent of total revenue, sales and marketing expenses decreased to 44% for 2001 from 53% for 2000, primarily due to the increase in total revenue.

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General and administrative.    Our general and administrative expenses increased 54% to $5.5 million for 2001 from $3.6 million for 2000. As a percent of total revenue, general and administrative expenses increased to 11% for 2001 from 10% for 2000. These increases were the result of hiring additional finance and operations personnel, increased insurance expenses and increased legal, accounting, consulting and other costs associated with being a public company.

Stock-based compensation.    Stock-based compensation expense was $1.0 million for 2001 and $952,000 for 2000. Stock-based compensation expense for 2001 related to the following: cost of maintenance revenue of $33,000, research and development expenses of $423,000, sales and marketing expenses of $408,000 and general and administrative expenses of $148,000. Stock-based compensation expense for 2000 related to the following: cost of maintenance revenue of $28,000, research and development expenses of $464,000, sales and marketing expenses of $403,000 and general and administrative expenses of $57,000.

Other income, net

Other income, net increased 197% to $1.9 million for 2001 from $647,000 for 2000, primarily as a result of higher interest income from increased cash and investment balances. The increased cash and investment balances were a result of cash proceeds from our initial public offering in October 2000, as well as cash generated from operations. In addition, we recorded a nonrecurring gain on the sale of long-term investments of approximately $72,000 during 2001.

Income Taxes

We recorded a tax provision of $304,000 for 2001 which represented federal and state minimum taxes as well as foreign income taxes on international subsidiaries. We incurred a loss in 2000 and, therefore, no provision was recorded in that year.

Liquidity and Capital Resources

As of December 31, 2002, we had cash and cash equivalents of $8.9 million, short-term investments of $32.5 million, an accumulated deficit of $15.8 million and working capital of $32.6 million. Net cash provided by operating activities was $2.9 million, $6.1 million and $419,000 for 2002, 2001 and 2000, respectively. The decrease in net cash provided by operating activities in 2002 from 2001 was primarily due to a net loss in 2002 compared to net income in 2001 and a lower increase in deferred revenue in 2002. The increase in net cash provided by operating activities in 2001 from 2000 was primarily due to net income in 2001 compared to a net loss in 2000 and a lower increase in accounts receivable in 2001.

Net cash used in investing activities was $10.7 million, $16.6 million and $18.4 million for 2002, 2001 and 2000, respectively. Net cash used in investing activities during 2002 was mainly for acquisitions of products and technology as well as purchases of computers, software and furniture. Net cash used in investing activities during 2001 and 2000 was primarily for investments of cash received from our initial public offering and cash generated from operations, as well as purchases of computers, software and furniture as we expanded operations. We expect to use approximately $1.3 million of cash to purchase property and equipment during 2003.

Net cash provided by financing activities was $19,000, $2.7 million and $39.8 million for 2002, 2001 and 2000, respectively. In 2002, net cash provided by financing activities was from the sale of common stock as employees exercised stock options and purchased shares through our employee stock purchase plan, offset by repurchases of our stock. In 2001, net cash provided by financing activities was primarily from the sale of common stock as employees exercised stock options and purchased shares through our employee stock purchase plan. In 2000, net cash provided by financing activities was primarily due to the sale of our Series C preferred stock in March 2000 and the sale of common stock during our initial public offering in October 2000.

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The following summarizes our contractual obligations as of December 31, 2002, and the effect such obligations are expected to have on our liquidity and cash flow in future periods (in thousands):

Our future liquidity and capital requirements will depend on numerous factors, including:

We believe that our cash and short-term investments balance of $41.3 million as of December 31, 2002 will be sufficient to meet our operating and capital requirements through at least the next 12 months. However, it is possible that we may require additional financing within this period. For example, we used approximately $7.4 million of cash during 2002 for acquisitions of products and technology and we intend to continue to invest in the development of new products and enhancements to our existing products. In addition, even if we have sufficient funds to meet our anticipated cash needs in the next 12 months, we may need to raise additional funds beyond this time. We may be required to raise those funds through public or private financings, strategic relationships or other arrangements. We cannot assure that such funding, if needed, will be available on terms attractive to us, or at all. Furthermore, any additional equity financing may be dilutive to shareholders, and debt financing, if available, may involve restrictive covenants. If we fail to raise capital when needed, our failure could have a negative impact on our profitability and our ability to pursue our business strategy.

Recent Accounting Pronouncements

In July 2001, the FASB issued Statement of Financial Accounting Standards No. 141, Business Combinations (“SFAS 141”). SFAS 141 establishes new standards for accounting and reporting for business combinations and requires that the purchase method of accounting be used for all business combinations initiated after June 30, 2001. Use of the pooling-of-interests method is prohibited. Our adoption of this statement during the first quarter of 2002 did not have a material effect on our operating results or financial position.

In July 2001, the FASB issued Statement of Financial Accounting Standards No. 142, Goodwill and Other Intangible Assets (“SFAS 142”), which supersedes APB Opinion No. 17, Intangible Assets. SFAS 142 establishes new standards for goodwill, including the elimination of goodwill amortization to be replaced with methods of periodically evaluating goodwill for impairment. Our adoption of this statement during the first quarter of 2002 did not have a material effect on our operating results or financial position.

In August 2001, the FASB issued Statement of Financial Accounting Standards No. 144, Accounting for the Impairment or Disposal of Long-Lived Assets (“SFAS 144”), which supersedes Statement of Financial Accounting Standards No. 121, Accounting for the Impairment of Long-Lived Assets and for Long-Lived Assets to be Disposed Of. SFAS 144 addresses financial accounting and reporting for the impairment or disposal of

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long-lived assets. Our adoption of this statement during the first quarter of 2002 did not have a material effect on our operating results or financial position.

In June 2002, the FASB issued Statement of Financial Accounting Standards No. 146, Accounting for Costs Associated with Exit or Disposal Activities (“SFAS 146”). SFAS 146 eliminates Emerging Issues Task Force Issue No. 94-3 “Liability Recognition for Certain Employee Termination Benefits and Other Costs to Exit an Activity (Including Certain Costs Incurred in a Restructuring).” Under SFAS 146, liabilities for costs associated with an exit or disposal activity are recognized when the liabilities are incurred, and fair value is the objective for initial measurement of the liabilities. SFAS 146 will be effective for exit or disposal activities that are initiated after December 31, 2002. We do not believe that the adoption of SFAS 146 will have a material effect on our operating results or financial position.

In November 2002, the Financial Accounting Standards Board issued FASB Interpretation (FIN) No. 45, Guarantor’s Disclosure Requirements for Guarantees, Including Indirect Guarantees of Others. FIN No. 45 clarifies the guarantor’s requirements relating to the guarantor’s accounting for, and disclosure of, the issuance of certain types of guarantees and requires the guarantor to recognize at the inception of a guarantee a liability for the fair value of the guarantee obligation. The provisions for the initial recognition and measurement of guarantees are effective on a prospective basis for guarantees that are issued or modified after December 31, 2002 and we do not believe these provisions will have a material effect on our operating results or financial position.

In December 2002, the FASB issued Statement of Financial Accounting Standards No. 148, Accounting for Stock-Based Compensation—Transition and Disclosure (“SFAS 148”). SFAS 148 amends Statement of Financial Accounting Standards No. 123 (“SFAS 123”), Accounting for Stock-Based Compensation, to provide alternative methods of transition for an entity that changes to the fair value method of accounting for stock-based employee compensation, and to require expanded and more prominent disclosure of the effects of an entity’s accounting policy with respect to stock-based employee compensation. Our adoption of the expanded disclosure requirements of this statement during the fourth quarter of 2002 did not have a material effect on our operating results or financial position.

Factors Affecting Future Operating Results

Our sales and operating results have been, and may continue to be, negatively impacted by the adverse economic conditions, particularly in the United States

We have experienced negative effects from the economic downturn in the United States, particularly in those markets with a heavier reliance on the networking and communications industry, and, to an extent, in Europe and Japan. We have also experienced particular weakness in sales to startup companies. Many of our customers continue to tightly control spending and have reduced or delayed purchase orders. Additionally, in an effort to reduce near-term spending, more customers have been seeking time-based agreements, which causes us to recognize revenue ratably. These conditions have resulted in a lower level of demand and revenue for our FPGA products as well as longer sales cycles. This downturn could continue or worsen, and may further extend to other geographic regions. A continuation or worsening of current economic conditions in the market for FPGA and ASIC software products, the health of networking and communications companies and the level of venture funding, or extension of such conditions to other geographic regions or industries, would continue to adversely affect our business.

We have a history of losses and may experience losses in the future, which could result in the market price of our common stock declining

We had a net loss of $3.3 million in 2002, and have had significant net losses in the past, including net losses of $2.6 million in 2000 and $6.9 million in 1999. We expect to continue to incur significant levels of

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research and development, sales and marketing and general and administrative expenses. If revenue does not increase or continues to decline, we may not be able to control our costs in order to achieve profitability. If we are not profitable, the market price of our common stock may decline, perhaps substantially.

Our expenses may increase in the next 12 months as we:

Any failure to significantly increase our new product bookings and revenue as we implement our product and distribution strategies would also harm our ability to achieve or maintain profitability and could negatively impact the market price of our common stock.

Our revenue could decline as a result of increases in sales of time-based licenses

We have recently seen an increase in the number and dollar amount of time-based license agreements. Time-based licenses as a percentage of total bookings increased in 2002 from 2001. We expect this trend to continue since customers may generally prefer time-based licenses over perpetual licenses for our newer, higher-priced products and customers who previously purchased perpetual licenses may choose to convert to time-based licenses. Time-based license agreements generally have terms from one to three years and we recognize revenue from them ratably over the term of the agreements. Increases in time-based licenses could affect our revenue growth due to the delayed timing of revenue recognition for such licenses. If our average selling price of time-based licenses decreases, or if customers do not renew such licenses, our revenue could also decline. Any continued decline in our revenue, or lack of significant growth in our revenue, could result in a decrease in our stock price because our revenue may fail to meet the expectations of investment analysts and others.

Our common stock may be subject to substantial price and volume fluctuations due to a number of factors, many of which will be beyond our control, which may prevent our shareholders from reselling our common stock at a profit

The securities markets recently have experienced significant price and volume fluctuations and the market prices of the securities of technology companies have been especially volatile. For example, our stock traded between a high of $13.50 and a low of $3.56 during 2002. This market volatility, as well as general economic, market or political conditions including terrorist activity, war or other acts of violence, could reduce the market price of our common stock regardless of our operating performance. Furthermore, because our stock generally trades at relatively low volumes, any sudden increase in trading volumes can cause significant volatility in the stock price. In addition, our operating results could be below the expectations of investment analysts and investors, and in response, the market price of our common stock could decrease significantly. In the past, companies that have experienced volatility in the market price of their stock have been the object of securities class action litigation. If we were the object of securities class action litigation, it could result in substantial costs, liabilities and a diversion of management’s attention and resources.

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Our quarterly operating results and stock price may fluctuate because our ability to accurately forecast our quarterly sales is limited, our costs are relatively fixed in the short term and we expect our business to be affected by seasonality

Our ability to accurately forecast quarterly sales is limited, which makes it difficult to predict the quarterly revenue that we will recognize. In addition, the time required to initiate and complete a sale for our FPGA products is generally short, and our ability to foresee and react to changes in customer demand for our products may be limited and therefore inaccurate. Most of our costs are for personnel and facilities, which are relatively fixed in the short term. If we have a shortfall in revenue in relation to our expectations, we may be unable to reduce our expenses quickly to avoid lower quarterly operating results. Consequently, our quarterly operating results could fluctuate, and the fluctuations could adversely affect the market price of our common stock. In addition, in the past we have experienced fluctuations in the sale of licenses for our products due to seasonality. For example, sales may decline during the summer months, particularly in European markets, and we have experienced and anticipate we will continue to experience relatively lower product bookings in our first quarter due to patterns in the capital budgeting and purchasing cycles of our current and prospective customers and the economic incentives for our sales force. These factors may lead to fluctuations in our quarterly operating results.

We have relied and expect to continue to rely on sales of our Synplify, Synplify Pro and HDL Analyst products for a substantial portion of our license revenue, and a decline in sales of these products could cause our license revenue to decline

Historically, we have derived a significant majority of our revenue from sales of our Synplify, Synplify Pro and HDL Analyst products. License revenue for our Synplify, Synplify Pro and HDL Analyst products accounted for approximately 81%, 82% and 83% of our license revenue in 2002, 2001 and 2000, respectively. We expect that revenue from these products will continue to account for a majority of our license revenue for at least the next 12 months. Any factors adversely affecting the pricing of our licenses or demand for our Synplify, Synplify Pro and HDL Analyst products, including overall market conditions, competition or technological change, could cause our license revenue to decline and our business to suffer. Factors that may affect sales of our Synplify, Synplify Pro and HDL Analyst products, some of which are beyond our control, include the following:

We may not succeed in developing, marketing and selling new logic synthesis, physical synthesis and verification products, and our operating results may decline as a result

We intend to develop additional logic synthesis, physical synthesis and verification products that leverage our core capabilities. We also intend to develop new features for our existing products. Developing new products and new features for existing products that meet the needs of electronic product designers requires significant investments in research and development. If we fail to introduce new products or enhanced versions of existing products in a timely and cost-effective manner, our business could be negatively affected. Growing competition, technological changes that negatively affect the demand for FPGAs and ASICs and our inexperience in selling our products to customers that design ASICs could also adversely affect our revenue. If we fail to successfully identify, develop, market and sell new products and enhance our current products, our operating results will decline.

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We introduced our Certify product in 1999 and our Amplify Physical Optimizer product in March 2000. We will need to continue to increase sales of these products in order to increase our revenue and regain profitability. We introduced our Synplify ASIC product in June 2001, and began selling our acquired Fortify PowerPlanner and RealPower products in July 2002 and our acquired Identify product in November 2002. Our future growth and profitability will depend on our ability to gain market acceptance of our newly introduced products, especially our Synplify ASIC product. In addition, sales of our ASIC products may depend on a dedicated sales force that we have only recently begun to provide, or may require substantial training of our existing sales force. We cannot be certain that our newer products, our entry into the ASIC logic synthesis product market or other new markets, or our acquired products, will be successful. If customers do not widely adopt such products, our operating results could decline.

Our revenue could decline substantially if our existing customers do not continue to purchase additional licenses or maintenance from us

We rely on sales of additional licenses to our existing customers, as well as annual maintenance renewals for our products. Additional license sales to our existing customers represented approximately 73%, 75% and 73% of our license sales in 2002, 2001 and 2000, respectively. If we fail to sell additional licenses for our products to our existing customers, we would experience a material decline in revenue. Even if we are successful in selling our products to new customers, the level of our revenue could be harmed if our existing customers do not continue to purchase a substantial number of additional licenses from us or fail to renew their maintenance. We have seen declines in our maintenance renewal rate including, but not limited to, the effects of customers unable to renew maintenance on some or all of their licenses due to business conditions or budget restrictions. If we continue to experience this pressure, our maintenance revenue could stop growing or decline.

If we continue to experience an increase in the length of our sales cycle, our quarterly operating results could become more unpredictable and our stock price may decline as a result

We experience sales cycles, or the time between an initial customer contact and completion of a sale, of generally two weeks to several months for our FPGA products, depending on the product. As a result of the current economic downturn, we have experienced an increase in the length of our sales cycle. If we continue to experience such an increase in the length of our sales cycle, our quarterly operating results could suffer and our stock price could decline as a result. The sales cycles for our Certify product, our Synplify ASIC product and our Fortify products are substantially longer than that of our FPGA products, which could result in additional unpredictability of our quarterly revenue. Since we have limited experience selling our new Identify product, its sales cycles could be longer than we expect and could add to the unpredictability in our revenue from quarter to quarter. In addition, for all of our products, customers often purchase a small number of licenses and then incrementally increase the number of licenses over time. If customers were to implement enterprise-wide evaluation programs or purchase products for the entire organization at one time, our sales cycle could lengthen and our revenue could be more unpredictable from quarter to quarter.

Our business depends on continued demand for networking and communications equipment and other complex electronic equipment that incorporate FPGAs or ASICs and our revenue may suffer if demand for this equipment continues to decline

Demand for networking and communications equipment declined during the last 24 months due to reduced capital spending and delays in network build-outs. Also, potential consumers of networking and communications equipment, such as communications companies, may use or modify existing types of equipment instead of adopting new networking and communications equipment. If the business of networking and communications equipment manufacturers continues to decline, our revenue and business will suffer because our products are used to design a number of the FPGAs or ASICs that are an integral part of networking and communications equipment.

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The markets for FPGAs and ASICs are evolving and if these markets do not develop and expand as we anticipate, our revenue may not increase or may decline because our products may not be needed

We expect that the majority of our revenue will continue to come from sales of our logic synthesis, physical synthesis and verification products. We depend on the growing use of logic synthesis products to design FPGAs for use in networking and communications, computer and peripheral, consumer, military/aerospace and other electronics systems. If the role of FPGAs in these types of equipment does not increase, or decreases, our revenue would decline. The FPGA market may not expand if customers choose to use other semiconductors that might be more affordable or available with shorter time-to-market schedules. This could cause electronic equipment manufacturers to limit the number of new FPGAs they design and would reduce their need for our products. We also depend on the continued adoption of ASICs. If demand for our software products were to not grow as expected or decline, we may choose to lower the prices of our products or we may sell fewer licenses and have lower maintenance renewal rates. In addition, if equipment manufacturers do not widely adopt the use of FPGAs, or if there is a wide acceptance of alternative semiconductors that provide enhanced capabilities, the market price of our stock could decline due to our lower operating results or investors’ assessment that the growth potential for sales of our licenses is limited.

The markets for FPGAs and ASICs are evolving and we cannot predict their potential sizes or future growth rates. Our success in generating revenue in these evolving markets will depend on, among other things, our ability to:

We depend on our marketing, product development and sales relationships with leading FPGA manufacturers, and if these relationships suffer, we may have difficulty introducing and selling our FPGA synthesis products and our revenue could decline

We believe that our success in maintaining acceptance in the FPGA market depends in part on our ability to maintain or further develop our strategic marketing, product development and sales relationships with leading FPGA manufacturers, including Altera Corporation and Xilinx, Inc. We believe our relationships with leading FPGA manufacturers are important in validating our technology, facilitating broad market acceptance of our FPGA synthesis products and enhancing our sales, marketing and distribution capabilities. For example, we attempt to coordinate our product offerings with the future releases of Altera’s and Xilinx’s FPGA components and software. If we are unable to maintain and enhance our existing relationships with Altera and Xilinx and develop a similar relationship with other major FPGA vendors, we may have difficulty selling our FPGA synthesis products or we may not be able to introduce products on a timely basis that capitalize on new FPGA component characteristics or software feature enhancements.

We need to develop our marketing, sales and product and library support relationships with leading ASIC manufacturers, and if we fail to do so, we may have difficulty selling our ASIC products and our revenue could be negatively impacted

We believe that our success in penetrating the ASIC market depends in part on our ability to develop strategic marketing, sales and product and library support relationships with leading ASIC manufacturers. We believe relationships with leading ASIC manufacturers are important in validating our technology, facilitating

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market acceptance of our ASIC products and enhancing our sales, marketing and distribution capabilities. For example, we recently entered into relationships with ASIC vendors such as International Business Machines Corporation, Fujitsu and Faraday Technology Corporation, to support our Synplify ASIC product. These companies have worked with us to qualify our software for their ASIC design flows. In addition, we have recently announced a development and marketing agreement with NEC Corporation to optimize our Synplify ASIC product for one of their device families. If we are unable to expand these or continue to develop such relationships with other key ASIC manufacturers or do not do so in a timely manner, we may have difficulty selling our ASIC products. In addition, we may not be able to enhance our products in a timely manner to capitalize on new ASIC component characteristics or software feature enhancements, which could negatively impact our revenue growth.

Because we utilize channel partners to sell a portion of our products, our revenue could decline if our existing channel partners do not continue to purchase products from us

We utilize semiconductor distributors Insight Electronics LLC and Arrow Electronics to refer customers to us, which account for a portion of our license sales in North America. A portion of our sales outside North America and Japan are conducted through our channel partners. Sales to our channel partners accounted for approximately 6%, 9% and 14% of our total revenue in 2002, 2001 and 2000, respectively. If we fail to sell our products through our existing channel partners, we could experience a decline in revenue. In the past, we have terminated our relationships with certain channel partners for a number of reasons, including poor performance. None of our existing channel partners is obligated to continue selling our products. We face the risk that one or more of our channel partners will not continue to represent our products or that our channel partners will not devote a sufficient amount of effort and resources to selling our products in their respective territories.

If we are unable to staff our customer support organization to sufficiently meet the needs of our customers, we may not be able to retain our existing customers or attract new customers, and our revenues could decline as a result

We may need to increase our customer support staff to support new customers and meet the expanding needs of our existing customers. If our level of hiring is not adequate and we are unable to staff our customer support organization to sufficiently meet the needs of our customers, we may not be able to retain our existing customers, customers may not renew their maintenance or we may not be able to attract new customers.

We may not be able to effectively compete against other providers of products that design FPGAs and ASICs as a result of their greater financial resources, product offerings and distribution channels, which could cause our sales to decline

We face significant competition from larger companies that market suites of semiconductor design software products which address all or almost all steps of semiconductor design or which incorporate intellectual property components for semiconductors. These competitors have greater financial resources and name recognition than we do. We believe that Cadence, Mentor Graphics and Synopsys, each of which is also currently competing with us by marketing certain logic synthesis or verification products, could provide suites of products or individual products that include the functionality we currently provide in our products and at lower prices or they may otherwise have more favorable relationships with customers. If these or other vendors provide lower cost logic synthesis, physical synthesis or verification products that outperform our products in addition to having broader applications of their existing product lines, our products could become difficult to sell. In addition, we believe our ASIC synthesis product must provide substantially higher quality and value to potential customers for us to be successful in obtaining meaningful market share in the ASIC software tools market. Even if our competitors’ standard products offer functionality equivalent to that of our products, we face a substantial risk that a significant number of customers would elect to pay a premium for similar functionality rather than purchase products from a less well-known vendor. Increased competition may negatively affect our business and future operating results by leading to price or market share reductions, or higher selling expenses.

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Our revenue could be reduced if large semiconductor design software companies make acquisitions in order to join their extensive distribution capabilities with our competitors’ products

Large semiconductor design software vendors, such as Cadence, Mentor Graphics and Synopsys, may acquire or establish cooperative relationships with our other current competitors, including private companies. Because large semiconductor design software vendors have significant financial and organizational resources, they may be able to further penetrate the logic synthesis, physical synthesis or verification markets by leveraging the technology and expertise of smaller companies and utilizing their own extensive distribution channels. We expect that the semiconductor design software product industry will continue to consolidate. For example, in June 2002, Synopsys completed its acquisition of Avant! Corporation. Cadence completed its acquisitions of Plato Design Systems, Inc. in April 2002 and Simplex Solutions, Inc., whose products compete with our Fortify family of products, in June 2002. Additionally, Mentor Graphics completed cash tender offers for IKOS Systems, Inc. in March 2002 and for Innoveda, Inc. in May 2002. It is possible that new competitors or alliances among competitors may emerge and rapidly acquire significant market share, which would harm our business and financial prospects.

We may face increased competition as a result of FPGA manufacturers competing in the design software market or investing in emerging software companies

FPGA manufacturers currently compete in the FPGA design software market by licensing their own synthesis products and/or by distributing our competitors’ products. For example, both Altera and Xilinx sell synthesis products that are competitive with our Synplify and Synplify Pro products and could adversely impact the price or market for our FPGA synthesis products or harm our business and financial prospects. FPGA manufacturers may also choose to assist, through financial, equity investment or other support, emerging EDA software companies whose products could compete with or outperform ours. A significant increase in the number of our competitors or competing products could reduce the value of our products in the market place and adversely affect our business.

Our products are subject to rapid technological change and could be rendered obsolete and unmarketable

The semiconductor design software market is characterized by rapid technological change, frequent new product introductions and enhancements, uncertain product life cycles, changes in customer demands and evolving industry standards. Our products could be rendered obsolete if design products based on new technologies are introduced or new industry standards emerge. For example, if customers widely adopt new engineering languages to describe their semiconductor designs and our products fail to support those languages adequately, our business will suffer.

We may sell fewer products and our revenue may decline if other vendors’ products are no longer compatible with ours or other vendors bundle their products with those of our competitors and sell them at lower prices

Our ability to sell our products depends in part on the compatibility of our products with other vendors’ semiconductor design software and verification hardware products. These vendors may change their products so that they will no longer be compatible with our products. Some vendors already bundle their products with other logic synthesis, physical synthesis or verification products and sell the bundle at lower prices, and more vendors may do so in the future. As a result, this may negatively affect our ability to offer commercially viable or competitive products.

We may not be able to preserve the value of our products’ intellectual property rights because we do not have an extensive patent portfolio, and other vendors could challenge our intellectual property rights

Our products are differentiated from those of our competitors by our internally developed technology that is incorporated into our products. If we fail to protect our intellectual property rights, other vendors could sell logic

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synthesis, physical synthesis or verification products with features similar to ours, which could reduce demand for our products. We protect our intellectual property rights through a combination of copyright, trade secret and trademark laws. We have filed a number of patent applications and to date have been issued six patents. We generally enter into confidentiality or license agreements with our employees, consultants and corporate partners, and generally seek to control access to our intellectual property rights and the distribution of our logic synthesis, physical synthesis and verification products, documentation and other proprietary information. However, we believe that these measures afford only limited protection. Others may develop technologies that are similar or superior to our technology or design around the copyrights and trade secrets we own. Despite our efforts to protect our proprietary rights, unauthorized parties may attempt to copy or otherwise improperly obtain and use our products or technology. Policing unauthorized use of our products is difficult and expensive, and we cannot be certain that the steps we have taken will prevent misappropriation of our technology, particularly in foreign countries where the laws may not protect our proprietary rights as fully as those in the United States. For example, with respect to our sales and support operations in India, Indian laws do not protect proprietary rights to the same extent as the United States, and Indian statutory law does not protect service marks. Our means of protecting our proprietary rights may be inadequate.

Our operating results would suffer if we were subject to a protracted infringement claim or a significant damage award

Substantial litigation and threats of litigation regarding intellectual property rights exist in our industry. We expect that logic synthesis, physical synthesis and verification products may be increasingly subject to third-party infringement claims as the number of competitors in our industry segment grows and the functionality of products in different industry segments overlaps. We are not aware that our products employ technology that infringes any valid proprietary rights of third parties. However, third parties may claim that we infringe their intellectual property rights. Any claims, with or without merit, could:

These royalty or licensing agreements may not be available on terms acceptable to us, if at all. A successful claim of product infringement against us or our failure to license the infringed or similar technology could adversely affect our business because we would not be able to sell the impacted product without exposing ourselves to litigation risk and damages. Furthermore, redevelopment of the product so as to avoid infringement would cause us to incur significant additional expense. Although we maintain general business insurance, it does not cover infringement claims. We would be required to pay any damages and legal expenses from a successful claim ourselves. In addition, because we also provide standard warranties against and indemnification for the potential infringement of third party intellectual property rights to our customers, we would be financially exposed to satisfy these obligations to our customers.

Because our strategy to expand our international operations is subject to uncertainties, we may not be able to expand our presence in international markets or generate a significant level of revenue from those foreign markets

Customers outside North America accounted for approximately $13.5 million, $11.8 million and $7.1 million of our total revenue in 2002, 2001 and 2000, respectively. The dollar amount of our international sales must grow substantially in order for us to achieve and maintain profitability. Sales in Europe and Japan declined in 2002 from 2001 as a result of the worldwide economic slowdown. A continuation or further decline

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in these economic conditions, or an extension of such conditions to additional international locations, would adversely impact our business.

We have international offices in the United Kingdom, France, Germany, the Netherlands, Sweden, Israel, India, Japan, Korea and Taiwan. We also rely on indirect sales in Asia, Europe and elsewhere. We have increased our international sales activities, but we still have limited experience in marketing and directly selling our products internationally. Our sales contracts generally provide for payment for our products in United States dollars. However, direct sales to our customers in Japan are in yen and we expect all such future sales there will be denominated in yen. Our expenses incurred in foreign locations are generally denominated in the respective local currency, and as a result, our future revenue and expense levels from international operations may be unpredictable due to exchange rate fluctuations. In January 2003, we began entering into foreign currency forward exchange contracts designed to reduce our exposure to changes in the Japanese yen. The outstanding forward contracts generally have maturities of approximately one month from the date into which they were entered. Our international operations are subject to other risks, including:

We may not be successful in integrating the businesses or technologies that we acquire, or the expected benefits may not be realized as projected

In 2002, we acquired products and technology from IOTA and Bridges2Silicon. We may make additional acquisitions in the future as a part of our efforts to increase revenue and expand our product offerings. In addition to added direct costs, acquisitions pose a number of risks, including:

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While we make efforts to analyze acquisition candidates carefully, we cannot be certain that any completed acquisitions will positively impact our business. Future acquisitions could also subject us to significant asset impairment or restructuring charges.

Significant errors in our products or the failure of our products to conform to specifications could result in our customers demanding refunds from us or asserting claims for damages against us

Because our logic synthesis, physical synthesis and verification products are complex, our products could fail to perform as anticipated or produce semiconductors that contain errors which go undetected at any point in the customers’ design cycle. While we continually test our products for errors and work with users through our customer support service organization to identify and correct errors in our software and other product problems, errors in our products may be found in the future. Although a number of these errors may prove to be immaterial, many of these errors could be significant. The detection of any significant errors may result in:

We warrant that our products will operate in accordance with certain specifications. If our products fail to conform to these specifications, customers could demand a refund for the purchase price or assert and collect on claims for damages. Although we maintain general business insurance, our coverage does not extend to product liability claims and we cannot assure that our resources would be sufficient to pay a damages award if one were to arise.

Moreover, because our products are used in connection with other vendors’ products that are used to design complex FPGAs and ASICs significant liability claims may be asserted against us if our products do not work properly, individually or with other vendors’ products. Our agreements with customers typically contain provisions intended to limit our exposure to liability claims. However, these limitations may not preclude all potential claims and we do not insure against such liabilities. Regardless of their merit, liability claims could require us to spend significant time and money in litigation and divert management’s attention from other business pursuits. If successful, a product liability claim could require us to pay significant damages. Any claim, whether or not successful, could seriously damage our reputation and our business.

We rely on the services of key personnel, and those persons’ knowledge of our business and technical expertise would be difficult to replace

Our products and technologies are complex and we rely on experienced and knowledgeable research and development, customer support and sales personnel. In particular, we depend substantially on the continued service of Bernard Aronson, our President and Chief Executive Officer, Kenneth S. McElvain, our Chief Technology Officer, Vice President and a founder, and Robert Erickson, our Vice President of Engineering. There is a limited number of qualified people with the technical skills and understanding of FPGAs and ASICs necessary to our business, and if we are unable to retain or find suitable replacements for any turnover in our engineering and sales organizations, our business could be adversely affected.

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Our officers and persons affiliated with our directors hold a substantial portion of our stock and could reject mergers or other business combinations that a shareholder may believe to be desirable

As of December 31, 2002, our directors, officers and individuals or entities affiliated with our directors owned approximately 53% of our outstanding common stock as a group. Acting together, these shareholders would be able to significantly influence all matters that our shareholders vote upon, including the election of directors or the rejection of a merger or other business combination that other shareholders may believe to be desirable.

ITEM 7A.    QUANTITATIVE AND QUALITATIVE DISCLOSURES ABOUT MARKET RISK

We develop products in the United States and sell those products primarily in North America, Europe and Japan. Our revenue from sales outside North America was approximately 30%, 24% and 21% of our total revenue in 2002, 2001 and 2000, respectively. As a result, our financial results could be affected by factors such as changes in foreign currency exchange rates or weak economic conditions in foreign markets. With the exception of sales in Japan, our sales are generally made in U.S. dollars, thus a strengthening of the U.S. dollar could make our products less competitive in foreign markets. The functional currency for our foreign subsidiaries excluding Japan is the United States dollar. Beginning January 1, 2001, the functional currency of our Japanese subsidiary is the yen. The effects of translation of our foreign subsidiaries for which the U.S. dollar is the functional currency are included in the results of operations, and to date have not been material. The effects of translation of our Japanese subsidiary are included in shareholders’ equity and to date have not been material. Historically, our exposure to foreign exchange fluctuations has been minimal. If foreign currency rates were to fluctuate by 100 basis points from rates as of December 31, 2002, the effect on our operating results and financial position would not be material. However, as our international sales and operations have expanded, our exposure to foreign currency fluctuations has increased, particularly in Japan. In January 2003, we began entering into foreign currency forward exchange contracts designed to reduce our exposure to changes in the Japanese yen. The outstanding forward contracts generally have maturities of approximately one month from the date into which they were entered.

Our interest income is sensitive to changes in the general level of U.S. interest rates, particularly since the majority of our investments are in short-term instruments. Due to the nature of our short-term investments, we have concluded that we do not have material market risk exposure. If market interest rates were to change immediately and uniformly by 100 basis points from levels as of December 31, 2002, the change in the fair value of our investment portfolio would not be material.

Our investment policy requires us to invest funds in excess of current operating requirements in:

As of December 31, 2002, our cash equivalents consisted primarily of money market funds and U.S. government agency notes, and our short-term investments consisted primarily of corporate notes, U.S. government agency notes and certificates of deposit.

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ITEM 8.    FINANCIAL STATEMENTS AND SUPPLEMENTARY DATA

Our consolidated financial statements and the independent auditors’ report appear on pages 42 through 65 of this Annual Report.

Quarterly Data (unaudited)

Not applicable.

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PART III

ITEM 10.    DIRECTORS AND EXECUTIVE OFFICERS OF THE REGISTRANT

The information required by this item concerning the Company’s directors is incorporated by reference to the sections captioned “Election of Directors” and “Section 16(a) Beneficial Ownership Reporting Compliance” contained in the Company’s Proxy Statement related to the 2003 Annual Meeting of Shareholders, to be filed by the Company with the Securities and Exchange Commission within 120 days of the end of the Company’s fiscal year pursuant to General Instruction G(3) of Form 10-K (the “Proxy Statement”). Certain information required by this item concerning executive officers is set forth in Part I of this Report in “Business—Management” and certain other information required by this item is incorporated by reference from the section captioned “Section 16(a) Beneficial Ownership Reporting Compliance” contained in the Proxy Statement.

ITEM 11.    EXECUTIVE COMPENSATION

The information required by this item is incorporated by reference to the section captioned “Executive Compensation” contained in the Proxy Statement.

ITEM 12.    SECURITY OWNERSHIP OF CERTAIN BENEFICIAL OWNERS AND MANAGEMENT

The information required by this item is incorporated by reference to the sections captioned “Principal Shareholders” and “Executive Compensation – Equity Compensation Plan Information” contained in the Proxy Statement.

ITEM 13.    CERTAIN RELATIONSHIPS AND RELATED TRANSACTIONS

The information required by this item is incorporated by reference to the sections captioned “Compensation Committee Interlocks and Insider Participation” and “Related Party Transactions” contained in the Proxy Statement.

ITEM 14.    CONTROLS AND PROCEDURES

We maintain disclosure controls and procedures that are designed to ensure that information required to be disclosed in our Exchange Act reports is recorded, processed, summarized and reported within the time periods specified in the SEC’s rules and forms, and that such information is accumulated and communicated to our management, including our Chief Executive Officer and Chief Financial Officer, as appropriate, to allow timely decisions regarding required disclosure based on the definition of “disclosure controls and procedures” in Rule 13a-14(c). In designing and evaluating the disclosure controls and procedures, management recognized that any controls and procedures, no matter how well designed and operated, can provide only reasonable assurance of achieving the desired control objectives, and management necessarily was required to apply its judgment in evaluating the cost-benefit relationship of possible controls and procedures.

Within 90 days prior to the date of this report, we carried out an evaluation, under the supervision and with the participation of our management, including our Chief Executive Officer and Chief Financial Officer, of the effectiveness of the design and operation of our disclosure controls and procedures. Based on the foregoing, our Chief Executive Officer and Chief Financial Officer concluded that our disclosure controls and procedures were effective.

There have been no significant changes in our internal controls or in other factors that could significantly affect the internal controls subsequent to the date we completed our evaluation.

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PART IV

ITEM 15.    EXHIBITS, FINANCIAL STATEMENT SCHEDULES AND REPORTS ON FORM 8-K.

(a)(1)  Financial Statements

The following consolidated financial statements are included in this Annual Report on Form 10-K:

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REPORT OF ERNST & YOUNG LLP, INDEPENDENT AUDITORS

The Board of Directors and Shareholders

Synplicity, Inc.

We have audited the accompanying consolidated balance sheets of Synplicity, Inc. (the “Company”) as of December 31, 2002 and 2001, and the related consolidated statements of operations, shareholders equity, and cash flows for each of the three years in the period ended December 31, 2002. Our audits also included the financial statement schedule listed in the index appearing under Item 15(a)(2) of the Annual Report on Form 10-K. These financial statements and schedule are the responsibility of the Company’s management. Our responsibility is to express an opinion on these financial statements and schedule based on our audits.

We conducted our audits in accordance with auditing standards generally accepted in the United States. Those standards require that we plan and perform the audit to obtain reasonable assurance about whether the financial statements are free of material misstatement. An audit includes examining, on a test basis, evidence supporting the amounts and disclosures in the financial statements. An audit also includes assessing the accounting principles used and significant estimates made by management, as well as evaluating the overall financial statement presentation. We believe that our audits provide a reasonable basis for our opinion.

In our opinion, the financial statements referred to above present fairly, in all material respects, the consolidated financial position of Synplicity, Inc. at December 31, 2002 and 2001, and the consolidated results of its operations and its cash flows for each of the three years in the period ended December 31, 2002, in conformity with accounting principles generally accepted in the United States. Also, in our opinion, the related financial statement schedule, when considered in relation to the basic financial statements taken as a whole, presents fairly in all material respects the information set forth therein.

/s/    ERNST & YOUNG LLP

Palo Alto, California

January 23, 2003

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