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UNITED STATES
SECURITIES AND EXCHANGE COMMISSION

FORM 10-K

For the fiscal year ended September 30, 2003

For the transition period from                      to                     .

Commission file number 000-31089

Virage Logic Corporation

47100 Bayside Parkway, Fremont, California 94538
(Address of principal executive offices)

Registrants’ telephone number, including area code: (510) 360-8000

Securities registered pursuant to section 12(b) of the Act:
None

Securities registered pursuant to section 12(g) of the Act:
Common stock, $.001 Par Value
(Title of class)

     Indicate by check mark whether the registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days. Yes [X] No [   ]

     Indicate by check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of registrant’s knowledge, in definitive proxy or information statements incorporated by reference in Part III of this form 10-K or any amendment to this Form 10-K. [X]

     Indicate by a check whether the registrant is an accelerated filer (as defined in Rule 12b-2 of the Act). Yes [X] No [   ]

     Aggregate market value of the registrant’s common stock held by non-affiliates of the Registrant as of October 31, 2003 was approximately $100 million based upon the closing price reported for such date on the Nasdaq National Market. For purposes of this disclosure, shares of common stock held by persons who hold more than 5% of the outstanding shares of common stock and shares held by officers and directors of the Registrant have been excluded because such persons may be deemed to be affiliates. This determination of affiliate status is not necessarily a conclusive determination for other purposes.

     The number of shares of the registrant’s Common Stock outstanding as of October 31, 2003 was 21,213,487.

Documents incorporated by reference

     Portions of the registrant’s proxy statement for its 2004 Annual Meeting of Stockholders are incorporated by reference into Part III of this Annual Report on Form 10-K.

Table of Contents

Virage Logic Corporation
Index to
Annual Report on Form 10-K
For Year Ended September 30, 2003

TABLE OF CONTENTS

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PART I

     With the exception of statements of historical fact, all statements made in this Form 10-K, including in the “Management’s Discussion and Analysis of Financial Condition and Results of Operations” in Item 7, are forward-looking statements that involve risks and uncertainties. These forward-looking statements include statements relating to strategy, products, customers, business prospects and relationships, trends and effects of acquisitions. In some cases, forward-looking statements can be identified by terminology such as “may,” “will,” “should,” “expect,” “anticipate,” “intend,” “plan,” “believe,” “estimate,” “potential,” or “continue,” the negative of these terms or other comparable terminology. Forward-looking statements are subject to a number of known and unknown risks and uncertainties which might cause actual results to differ materially from those expressed or implied by such statements. These risks include our ability to execute on our strategy to become a provider of semiconductor IP platforms, our ability to continue to develop new products and maintain and develop new relationships with third-party foundries and integrated device manufacturers, our ability to overcome the challenges associated with establishing licensing relationships with semiconductor companies, our ability to obtain royalty revenues from customers in addition to license fees, our ability to receive accurate information necessary for calculation of royalty revenues and to collect royalty revenues from customers, business and economic conditions generally and in the semiconductor industry in particular, pace of adoption of new technologies by our customers, competition in the market for semiconductor IP platforms, the ability to integrate In-Chip and its products into the Company and to maintain and develop relationships with existing In-Chip customers, and other risks and uncertainties including those set forth below under “Risk Factors”. These forward-looking statements speak only as of the date hereof; we expressly disclaim any obligation or undertaking to release publicly any updates or revisions to any forward-looking statements contained herein. The following discussion of our financial condition and results of operations should be read together with the consolidated financial statements and the notes thereto included elsewhere in this filing.

Item 1. Business

General

     Virage Logic Corporation provides semiconductor intellectual property (semiconductor IP) platforms based on memory, logic, I/Os (input/output interface components) and IP development tools that are silicon proven and production ready. Historically, we have engaged in the development and marketing of embedded memory products. After the acquisition of In-Chip Systems, Inc. in May 2002, we expanded our product offering to include also logic and I/Os products and IP development tools, and have recently began marketing these components as a semiconductor IP platform for our customers’ system-on-a-chip (SoC) designs. The expanded product offering positions us to capture additional “real estate” on the chip, which we believe will enable us to pursue greater market opportunities. These various forms of intellectual property (IP) are utilized by our customers to design and manufacture SoC integrated circuits that power today’s Internet and high-speed communications, computer and consumer products, such as cellular and digital phones, pagers, PDAs, digital cameras, DVD players, switches and modems. Our semiconductor IP consists of (1) embedded memories, (2) compilers that allow chip designers to configure our memories into different sizes and shapes on a single silicon chip, (3) memory test processor and fuse box components for embedded test and repair of defective memory cells, (4) software development tools that can be used to build memory compilers, (5) logic elements, and (6) I/Os. We also provide custom design services. Our customers include leading fabless semiconductor companies such as Altera, AMCC, ATI Technologies, Broadcom, PMC-Sierra, Sandisk, TranSwitch, and Vitesse Semiconductor, as well as leading integrated device manufacturers (IDMs) such as Agere, Agilent, AMI Semiconductor, Conexant, IBM, Infineon, Intel, Kawasaki, LSI Logic, Motorola, NEC, Philips Electronics, Sharp, Sony, STMicroelectronics and Toshiba.

     We develop our embedded memories, logic and I/O elements to comply with the manufacturing processes used to create the silicon chips for our customers’ products. For our integrated device manufacturer customers, we develop our products to comply with the processes used by their internal manufacturing facilities. For our fabless semiconductor customers, we develop our products to comply with the processes of the third-party semiconductor manufacturing facilities, or foundries, that these companies rely on to manufacture the silicon chips for their products. We also pre-test our products before their release on the market by having actual chips containing our semiconductor IP produced by third-party foundries, so that we can provide our customers with test data and assurance that chips produced using our semiconductor IP will be manufacturable, while producing optimal silicon

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wafer yields. Our products are certified for production by several of the leading third-party foundries used by fabless semiconductor companies. These include Taiwan Semiconductor Manufacturing Company (TSMC), United Microelectronics Company (UMC), Chartered Semiconductor Manufacturing (Chartered), Silterra Malaysia Sdn. Dhd. (Silterra), Silicon Manufacturing International Corporation (SMIC), and Tower Semiconductor, Ltd. (Tower). Because we ensure our products are silicon proven and production ready, our customers benefit from shorter design times for new product development and reduced design and manufacturing costs.

Corporate Information

     We incorporated in California on November 27, 1995. We reincorporated in Delaware on July 25, 2000. Our principal executive offices are located at 47100 Bayside Parkway, Fremont, California 94538. Our telephone number is (510) 360-8000. Our website address is www.viragelogic.com. Information on our website, and websites linked to it, is not intended to be part of this report.

Industry Background

     The growth of the Internet and the development of optical and wireless communications infrastructure are creating demand for communications equipment and digital appliances that can utilize the increases in available bandwidths. The system designers of these products are seeking technologies that will enable them to decrease the size, reduce the manufacturing costs and enhance the performance of their products. In response to this demand, semiconductor companies have developed technologies that permit entire electronic systems, including the microprocessor, communications, logic, graphics and memory elements, to be contained on a single silicon chip, called a system-on-a-chip (SoC), rather than on a circuit board.

     SoC design depends upon the reliable integration of the various components of the chip. Each component must comply with the manufacturing standards of the manufacturing facility that will produce the chip. Since different technical expertise and IP is required for each component of a SoC, it is difficult for many companies to internally develop the various IP needed for these components. In addition, the designers of products that use SoCs are facing increased market pressure to rapidly introduce new products, which shortens the time available for research and development involved in the design of a SoC. In order to accommodate the continuously increasing technical expertise required for the design of a SoC and the timing constraints involved in such design, many semiconductor companies are increasingly relying on external sources for the technical expertise and IP for various components of their SoC designs. The use of proven third-party IP components allows semiconductor companies to meet market pressures while continuing to focus on the components of the SoC that constitute their core competencies.

     The demand for high-performance computing and communications applications and the availability of increased bandwidth for Internet applications has made memory an increasingly critical element of the overall operation of SoCs used for these applications. Historically, integrated circuit designs were dominated by the logic function, while memory storage was usually provided in external devices. In order to achieve increased speeds, chip designs now require closer physical proximity and better integration between the logic and memory functions and require more customized memory functions. The need for this proximity, as well as advances in semiconductor technology and the ability to customize the size and configuration of memory functions within a SoC, is creating increased demand for embedded memory. It is now common for a SoC to contain many memories with different functions configured in different sizes and shapes to optimize the area and functionality of the chip. We estimate that memory functions typically comprise between 30-50% of the chip area in a SoC design and believe that this percentage will increase with the growth of memory-intensive applications.

     Semiconductor companies face significant challenges designing high-performance memories that can be easily integrated with other components, including logic, for their SoC devices. Due to continuing advancements in the semiconductor manufacturing processes, new designs have generally been required every one to two years. The internal design teams of semiconductor companies typically lack the dedicated resources necessary to keep pace with rapidly evolving memory designs. Suppliers of stand-alone memories for personal computers and other devices that include memory as a separate element on a circuit board often lack sufficient design expertise and software tools to provide custom high-performance memory for SoC designs. Similarly, suppliers of stand-alone logic and I/O components generally lack the focus and expertise necessary to develop embedded logic and I/O elements for

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SoC designs. These factors have created a market need for third-party providers of highly reliable, high-performance memory, logic and I/O IP for SoC design.

The Virage Logic Solution

     We provide IP for high-performance embedded memories, logic and I/O elements used in SoC designs, as well as software development tools and custom design services. We offer to our customers embedded memories, logic and I/O elements that are optimized for area, low power consumption and speed and that are available for the manufacturing processes of leading third-party semiconductor foundries. Key benefits of our solution include:

	•		Memory Design Expertise. Our memory design expertise allows us to provide our customers with leading-edge memory technologies for advanced manufacturing processes. We have assembled a global team of over 175 engineers focused exclusively on memory design. This team includes senior level engineers with significant expertise in various types of memory design, including SRAM, DRAM, Flash and EPROM.
	•		Logic Design Expertise. Our historical design expertise in carefully integrating large amounts of memory with advanced logic designs allows us to provide our customers with logic technologies for advanced manufacturing processes. We currently have a design team of over 25 engineers focused exclusively on logic design.
	•		Broad Product Line. We offer multiple types of memories, memory compilers, logic libraries and I/Os for advanced 0.25 micron, 0.18 micron, 0.15 micron, 0.13 micron and 90-nanometer processes. Our compilers allow our customers to generate the exact configuration of embedded memory needed for their SoC designs.
	•		Manufacturing-Tested Solutions. Each of our embedded memories has been customized, verified and tested for a particular manufacturing process on a silicon chip, or silicon proven, before being delivered to a customer. This verification substantially reduces the risk that the memory element will be defective and thereby reduces costly development delays our customers might experience from using in-house or other third-party designs that are not silicon proven. Our memories have been purchased by over 200 customers and by foundries that comprise over 90% of the third-party foundry market.
	•		Significant Design-Time Advantages. We offer silicon proven memories, logic and I/O components that comply with the standards for specific manufacturing processes. Our memories and software tools can be easily integrated into our customers’ SoC design processes. By eliminating the need to design specific embedded memories, our customers can shorten the design time for their system-on-a-chip.
	•		High-Density, High-Performance and Ultra-Low Power Consumption Embedded Memories. We have continued to expand our Area, Speed and Power (ASAP) Memory™ compiler offering to enable the generation of high-density, high-speed and ultra-low power consumption embedded memories in multiple configurations. These technologies have been developed using custom memory design techniques to achieve industry-leading results in area, speed and power consumption.
	•		High Density and Ultra High Density ASAP Logic Libraries. We offer an innovative and patented approach to routing and cell architecture for standard cell libraries that consistently yields smaller designs and higher routing utilization without sacrificing performance. We also provide patented metal programmable libraries that offer the flexibility to easily and quickly modify SoC designs while minimizing mask costs associated with frequent design changes.
	•		I/O Libraries. We offer highly differentiated base I/O libraries that results in smaller overall die sizes and provide an architecture that can accommodate specialty I/Os from partner providers of specialty I/O cells.
	•		Redundancy, Embedded Test and Repair. Our Self-Test and Repair (STAR) Memory System™, the first embedded memory product that allows design engineers to economically embed multiple megabits of SRAM into a SoC, includes an integrated test and repair capability that enables our customers to achieve higher yields of semiconductors. The system includes one or more STAR SRAM memory blocks, a STAR Processor and a STAR Fuse Box. The STAR SRAM comes with redundant locations, the STAR Processor decides how to test and repair defective SRAMs and the STAR Fuse Box stores the repair information. We believe these potentially higher yields will save our customers millions of dollars in recovered silicon and other raw materials, thereby substantially reducing test costs and enabling faster time-to-volume.
	•		Ease of Integration. We provide a complete set of software development tools to facilitate the integration of our memories, logic and I/Os with the other elements of a SoC design.

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The Virage Logic Strategy

     Our objective is to be the leading supplier of semiconductor IP platforms based on memory, logic and I/Os and to gain increasing “real estate” for complex SoCs designed and manufactured by our customers. Key elements of our strategy include the following:

	•		Position Virage Logic as a Leading Provider of Semiconductor IP Platforms. We have been known historically for our expertise in providing numerous embedded memory solutions for a variety of advanced products utilizing sophisticated SoC technologies. Our memory solutions have enabled designers to choose from a broad suite of memory products based on their requirements for area, speed, power consumption, redundancy and other technical parameters. With the addition of logic and I/O products to our semiconductor IP platforms, our goal is to position Virage Logic to capture additional “real estate” on the chip, while enabling our customers to choose highly integrated, high-performance, memory, logic and I/O solutions from our product portfolio, based on their unique design requirements. We believe this will position us to pursue larger market opportunities, while further entrenching our existing position as a leading provider of embedded memories to our customers.
	•		Enable the Manufacturing of Semiconductors Using Our Semiconductor IP at Leading Third-Party Semiconductor Foundries. We work with leading third-party foundries to qualify our semiconductor IP for high-volume production in their manufacturing processes. In this manner, we are in a position to provide embedded memories, logic and I/O elements, as well as compilers that are silicon proven for a specific foundry’s manufacturing process, directly to that foundry’s entire customer base. Our close associations with these foundries also give us early access to information for advanced processes thereby enabling us to be the first to market products on smaller process geometries.
	•		Become a Preferred IP Supplier to the Leading Fabless Semiconductor Companies. Fabless semiconductor companies, or semiconductor companies that do not manufacture their own silicon chips, spend substantial sums of money purchasing memory, logic and I/O elements to incorporate in their chips. Since these companies often lack the time and resources to internally develop embedded memories and logic components, which may be outside of their core competencies, or subject them to time-to-market constraints, they license IP from us. To date, we have licensed our IP to many leading fabless semiconductor companies including Altera, AMCC, ATI Technologies, Broadcom, PMC-Sierra, Sandisk, TranSwitch and Vitesse Semiconductor. We intend to continue to target the fabless semiconductor companies that produce the largest number of chips, which will enable us to increase the royalty revenue payments we receive based on levels of production from the foundries that manufacture chips for our fabless customers.
	•		Increase our Base of Integrated Device Manufacturer Customers. Integrated device manufacturers (IDMs) produce the largest number of integrated circuits and face significant cost and product differentiation challenges. The internal design teams of these companies are facing difficulties keeping pace with the increasing demand for, and proliferation of, embedded memory and logic technologies and the rapid innovation of these technologies and integration with other SoC components for advanced manufacturing processes. To date, we have licensed our IP to many leading IDMs including Agere, Agilent, AMI Semiconductor, Conexant, IBM, Infineon, Intel, Kawasaki, LSI Logic, Motorola, NEC, Philips Electronics, Sharp, Sony, STMicroelectronics and Toshiba. In addition, several IDMs are aligning their internal design flows with leading third party foundries and outsourcing semiconductor IP for SoCs to be produced at both the third-party foundries and their own internal foundries. These types of relationships will broaden our market for silicon proven standard products which are designed for the leading third-party foundries. We intend to build upon our ability to reduce these customers’ design time and costs in order to attract additional IDM customers.
	•		Continue to Innovate Existing Technologies for Advanced Manufacturing Processes. As the semiconductor manufacturers develop advanced manufacturing processes that enable increasing density and speed as well as lower power consumption, we intend to lead the market for semiconductor IP components. We have assembled a team of over 175 engineers and we believe this will allow us to be the first to market with semiconductor IP platforms for advanced manufacturing processes.

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	•		Continue to Solve Manufacturing and Yield Issues Facing Complex SoCs Circuits that Employ Multi-Megabit Embedded Memory Cells. We introduced the industry’s first embedded memory product that allows design engineers to economically embed multiple megabits of SRAM into a SoC. The integrated test and repair capability ensures higher yields of semiconductors and can potentially save millions of dollars in recovering chips that historically would have been rendered unrepairable, or repairable at significant cost. This capability also substantially reduces test costs and enables faster time-to-volume production. Embedded memory test and repair can take place either in the factory during the wafer probe process or in the field while the SoC is used in the end product, thereby enhancing the overall reliability of the product.
	•		Expand our Research and Development Efforts. We are focusing on developing new memory and logic architectures to support the convergence between computers, consumer products and communications markets. We intend to continue working with our development partners, TSMC, UMC, Chartered, Silterra, SMIC and Tower, to define the focus of our research and development activities to best address the changing needs of our customers.
	•		Expand Distribution Channels. We intend to expand our existing distribution channels by continuing to selectively hire direct sales force members to serve key markets worldwide. In November 2002, we established a sales subsidiary in Japan. In Asia, we continue to distribute our products through well-established independent distributors. We also intend to continue developing partnerships with value-added-resellers and other distributors of IP through our Virage Logic Intellectual Property Partner Program (VIP) to leverage their extensive U.S. and international sales organizations.

Our Products

     We offer a wide range of semiconductor IP including:

	•		embedded memories, logic and I/O elements;
	•		memory test processor and fuse box components for embedded test and repair of defective memory cells;
	•		software development tools that can be used to build memory compilers; and
	•		custom design services.

     Our Embedded Memory Semiconductor IP. We provide embedded memory semiconductor IP in predetermined shapes, sizes and types that can be incorporated by semiconductor designers into their SoC designs. We deliver our memory semiconductor IP to our customers through downloads from secure servers or on computer disks in a form that can be integrated directly into the design of the SoC.

     Our Embedded Memory Compilers. A compiler is a software program that allows semiconductor designers to configure memories to the desired specifications for their SoC designs. Our compiler products include:

	•		ASAP Memory. These compilers are optimized for high density, high performance and low-power consumption and can generate memories up to 512 kilobits in size. The ASAP memory product line is available in many different memory types including single- or dual-port register file, single- or dual-port SRAM, synchronous or asynchronous SRAM and ROM.
	•		NetCAM™. Our content-addressable memory, or CAM, compilers can be used in SoCs that are used in routers, switches and other high-bandwidth Internet infrastructure equipment to accelerate hardware-based searches. These high-speed ternary and binary CAMs are key enablers in moving high speed traffic through a network.
	•		STAR Memory System™. The system allows the designer to embed multiple megabits of SRAM into an SoC economically without sacrificing yield and manufacturability. The system includes one or more SRAM

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			blocks, a STAR Processor and a STAR Fuse Box. These memories are optimized for area, speed or power, incorporate self-test and repair capabilities and can generate up to eight megabits of embedded memory.
	•		NOVeA®. This innovative non-volatile electrically alterable embedded memory can be manufactured using standard logic processes. NOVeA can retain its data at power-off while allowing data to be reprogrammed and erased during normal operation. NOVeA provides on-chip storage of calibration data, passwords, critical access information, etc. It also helps the designer reduce overall system size, achieve lower power operation and increase system performance.

     Our Logic Semiconductor IP. We provide logic libraries through our ASAP Logic™ product line. These products are designed to improve logic block area utilization and SoC performance while decreasing the price and power consumption of the overall chip. We deliver our logic semiconductor IP to our customers through the same manner as our embedded memory semiconductor IP.

	•		ASAP High-Speed Metal Programmable Cell Library. This cell library provides high mask cost savings during SoC design revision since only two to five mask layers need to be changed to reconfigure the chip.
	•		ASAP High-Density Standard Cell Library. The cell architecture used in this cell library provides significantly increased pin accessibility, which along with other features, results in logic block area savings. This equates to an overall reduction in chip size and lower fabrication costs.

     Our Base I/O library. This fiscal year we added an input/output (I/O) library to our product portfolio. It contains all necessary elements to complete an I/O ring, a key element for the SoC’s communication with external electrical components.

     Our Software Development Tools. Our primary software development tool is EMBED-IT!® Architect, which allows semiconductor design companies to develop their own compilers with re-characterization capabilities. We also provide a software tool called EMBED-IT! Integrator to facilitate the design of multiple memory configurations used with SoCs.

     Our Custom Design Services. We offer custom memory design services for companies that require special configurations or functionality not supported by our compilers. This has led to a number of innovations and new technologies, such as our NetCAM technology. In addition we offer custom Standard Cell, Metal Programmable Cell and I/O libraries.

     During fiscal year 2003, revenues for 0.13 micron technology accounted for 53% of total revenues, revenues for 0.18 micron technology was 21% of total revenues, revenues for 90-nanometer technology was 7% of total revenues and revenues from the sale of other products was 19% of total revenues. In fiscal year 2002, revenues from these product technologies were broken down as 56% for 0.13 micron technology, 22% for 0.18 micron technology, 12% for 90-nanometer technology and 10% for other products. In fiscal year 2001, revenues from these product technologies were broken down as 53% from 0.13 micron technology, 36% from 0.18 micron technology, 0% for 90-nanometer technology and 11% for other products.

Markets and Applications

     We target markets with companies that utilize SoC technologies with high-performance, low-power architectures and high density requirements where we believe our silicon proven, semiconductor IP platforms provide customers with significant time-to-market, design and manufacturing cost advantages. Examples of the markets and applications in which our IP is implemented include:

	•		Communications and Internet Infrastructure. Communications SoCs are used throughout the Internet, including in routers, switches, DSL modems, gigabit ethernet equipment and high-bandwidth set-top boxes.
	•		Digital Appliances. Digital appliances increasingly require more functionality, Internet connectivity and low-power consumption. Our memories can be found in video game players, mobile phones, pagers, PDAs, digital cameras, high-definition televisions, cable set-top boxes and DVD players.

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•

Computers. Computation equipment such as personal computers, workstations and servers require more complex chip sets and embedded memory to achieve new features such as advanced 3D graphics and digital signal processing, or DSP.

Research and Development

     We believe that our future success will depend in large part on our ability to continue developing new products and expanding our existing products for advanced manufacturing processes. To this end, we have assembled a team of engineers with significant experience in the design and development of embedded memory and logic semiconductor IP. Currently, we are focusing our research and development efforts on development of different configurations for memories, logic and I/O platforms that support the latest manufacturing processes: 90-nanometer and 65-nanometer. We are also developing new memory and logic architectures to support the emerging communications markets and the convergence between these markets and the computer and consumer products markets.

     We have entered into agreements with TSMC, UMC, Chartered, Silterra, SMIC and Tower for the development and licensing of various semiconductor IP platform products for certain design rules of each of these foundry’s design rules. Our relationship with these foundries assists us to develop the focus of our research and development activities. Under such agreements each party owns its own IP, and the parties to each agreement jointly own any intellectual property co-developed under such agreements. Following development, we license the developed technologies to third parties that manufacture their silicon chips at the foundry. In exchange for our development, the foundries pay us licensing fees, as well as royalties based on silicon chips manufactured at the foundry using our semiconductor IP. In addition, both parties agree to provide technical, marketing and sales support as appropriate.

     Our research and development expenses were $18.7 million, $13.1 million and $9.6 million in fiscal 2003, 2002 and 2001, respectively, exclusive of amortization of deferred stock-based compensation. We expect that these costs will increase in the future in order to maintain a leading position as a third-party provider of silicon infrastructure in the form of semiconductor IP. At September 30, 2003, we had 135 employees engaged in research and development. We expect to identify and hire additional technical personnel in fiscal year 2004 to staff our planned research and development activities.

Sales and Marketing

     We focus our sales efforts through direct sales in North America, Europe and Asia. In Asia, we also derive indirect sales through distributors.

     Direct Sales. We maintain a network of direct sales representatives and field application engineers serving the United States, Asia, Canada and Europe. Substantially all of our direct sales representatives and field application engineers are located in North America, Europe and Japan and serve our customers in those regions. The sales force is distributed throughout North America with employees in the following locations: Austin, Boston, Fremont, Los Angeles, Newark, West Palm Beach and Ottawa. To serve our European customers, we have a direct sales organization based in the United Kingdom with additional sales personnel in Germany and Israel. This past year, we added experienced sales personnel for Japan and we will utilize a direct sales team in Asia to help support our independent distributors. Our sales force’s primary responsibility is to secure and maintain direct account relationships with fabless semiconductor companies and integrated device manufacturers for the license of our products. Developing a licensee relationship typically involves a three to six month sales cycle. In the past two years, we have sold our products to more than 200 customers.

     We enter into license agreements with our customers for a range of embedded memory, logic and I/O technologies. For our ASAP memory, ASAP logic and I/O products, in addition to collecting license and consulting fees from the customers, we receive royalties from third-party foundries that manufacture chips for our fabless customers. For our STAR Memory System, NetCAM and NOVeA products, we receive both license and royalty fees directly from our customers, as well as royalties from the third-party foundries that manufacture their chips. Our license agreements contain limited warranties and limits our liability for consequential damages arising from indemnification of IP infringement.

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     We have developed relationships through the Virage Logic IP (VIP) Partner Program with the following types of companies that provide us with customer referrals.

	•		Foundries. We have entered into marketing and technology relationships with several third-party foundries, including TSMC, UMC, Chartered, Silterra, SMIC and Tower. These relationships provide us with early access to new process technologies and endorsements from their direct sales force to our mutual customer base.
	•		EDA Vendors. We have entered into joint marketing relationships with a number of electronic design automation, or EDA vendors. These relationships allow us to validate our interoperability with these EDA vendors’ software design tools.
	•		Design Services. We have developed technology alliances with several design service companies who have experience with Virage Logic semiconductor IP. This allows our customers to augment their design teams or outsource their chip designs to these design service companies.

     Indirect Sales. In addition to the direct sales force, we also sell our technologies through a distributor in Japan and a distributor for the rest of Asia, primarily in Taiwan. These indirect sales organizations have expertise in selling semiconductor IP and software design tools. None of these relationships are exclusive.

Customers

     We have developed a strong customer base of semiconductor companies that use our semiconductor IP platforms to design complex SoCs. Purchasers of our embedded memories and logic elements include fabless semiconductor companies, integrated device manufacturers and third-party foundries. For fabless semiconductor customers, we license our semiconductor IP on either a single or multiple project basis. For IDMs, we license our semiconductor IP on a multiple project basis and offer our Embed-IT! Architect software as an option to develop and maintain their memory IP on the same software platform.

     The following chart provides a representative list of our major customers by customer type.

*

Indicates the ten customers that generated the highest level of revenues for us in fiscal 2003

     We expect a small number of companies to collectively represent between 20% and 40% of our revenues for the next few years. In fiscal 2003 and 2002, no customer generated more than 10% of our revenues. In fiscal 2001, Philips Electronics and Intel Corporation generated 12% and 14% of our revenues, respectively. As our customer base grows and the number of fabless semiconductor companies increases, we expect our dependence on any one customer for revenues to decline. However, as our sales to fabless semiconductor companies grow, we will become more dependent on the availability of new manufacturing process technologies and capacity from third-party foundries to manufacture our customers’ products.

Acquisition

     On May 24, 2002, the Company acquired In-Chip Systems, Inc., a provider of logic platforms for SoC applications, thereby extending our product offerings for our semiconductor IP platform.

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Proprietary and Intellectual Property

     We rely primarily on a combination of nondisclosure agreements and other contractual provisions, as well as patent, trademark, trade secret and copyright law to protect our proprietary rights. Our general policy has been to seek patent protection for those inventions and improvements likely to be incorporated in our technologies or otherwise expected to be of value. We have an active program to protect our proprietary technology through the filing of patents.

     As of October 31, 2003, we had 29 U.S. patents issued, 26 U.S. patent applications on file and twelve draft applications being prepared for filing with the U.S. Patent and Trademark Office (USPTO). Our patents expire at various dates between 2019 and 2023, and we expect that once granted, the duration of patents covered by patent applications will be 20 years from the filing of the application. These patents will allow us to prevent others from infringing on some of our core technologies. We intend to continue to file patent applications as appropriate in the future. We cannot be sure, however, that our pending patent applications will be allowed, that any issued patents will protect our IP or will not be challenged by third parties, or that the patents of others will not seriously harm our ability to do business. In addition, others may independently develop similar or competing technology or design around any of our patents. We also have not secured patent protection in foreign countries, and we can not be certain that the steps we take to prevent misappropriation of our intellectual property abroad will be effective.

     In addition to patent protection, at October 31, 2003, we had three U.S. trademarks registered and two pending U.S. trademark applications on file with the USPTO. If the applications mature to registrations, these registrations would allow us to prevent others from using other similar marks on similar goods and services in the U.S. We cannot be sure, however, that the USPTO will issue trademark registrations for any of our pending applications. Further, any trademark rights we hold or may hold in the future may be challenged or may not be of sufficient scope to provide meaningful protection.

     We protect the source code of our technologies as both trade secrets and unpublished copyrighted works. We license the object code to our customers for limited uses and maintain contractual controls over the use of our software, but we may not have the resources to enforce such controls, and such controls may be declared invalid or unenforceable. Wide dissemination of our software makes protection of our proprietary rights difficult, particularly outside the United States, and we may not be able to assert equivalent rights with respect to source code developed by our employees in the Republic of Armenia (Armenia) and India as we could if it were developed in the United States.

     We protect our trade secrets and other proprietary information through nondisclosure agreements with our employees and customers and other security measures, although others may still gain access to our trade secrets or discover them independently.

     Although we believe that our technologies do not infringe on any copyright or other proprietary rights of third parties, from time to time, third parties, including our competitors, may assert patent, copyright and other intellectual property rights to technologies that are important to us. As of October 31, 2003, no such claims exist.

Competition

     The semiconductor IP industry is very competitive and is characterized by constant technological change, rapid rates of technology obsolescence and the emergence of new suppliers. Our primary competition comes from the internal development groups of large IDMs that develop semiconductor IP for their own use. In addition, we face competition from other third-party providers of semiconductor IP, such as Artisan Components and Synopsys and certain DRAM IP providers, such as Monolithic System Technology, Inc.

     As we continue to introduce new technologies, we may face competition from both existing semiconductor IP suppliers and new ones entering the market. We may also face competition from semiconductor companies that currently offer stand-alone memory technologies, such as Cypress Semiconductor, Hynix Semiconductor, IDT, Micron Technology and Samsung, if these companies were to make their technologies available in embedded form.

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In addition, third-party foundries may decide in the future to distribute embedded memories and logic themselves, in addition to manufacturing chips containing third-party embedded memories.

     We believe that important competitive factors in our market include performance and functionality of product, the ability to customize products for customer needs, length of development cycle, price, compatibility with prevailing design methodologies, interoperability with other devices or subsystems, reputation for successful designs and installed base, and the level of technical service and support.

Employees

     At October 31, 2003, we had 300 employees, including 57 in sales and marketing, 135 in research and development, 95 in engineering and operations and 13 in general and administrative functions. We have 129 of our engineers and other significant employees located outside of the United States. We believe that our future success will depend in part on our continued ability to attract, hire and retain qualified personnel. None of our employees are represented by a labor union, and we believe our employee relations are good.

Executive Officers of the Registrant

     The names and ages of our existing executive officers and significant employees at November 14, 2003 are set forth below.

     Adam A. Kablanian co-founded Virage Logic and has served as our President, Chief Executive Officer and Director since January 1996. In August 2003, Mr. Kablanian resigned his position as Chairman of the Board and continues to serve as President, Chief Executive Officer and a member of the Board as a Director. Before co-founding Virage Logic, Mr. Kablanian was a Department Manager for LSI Logic, a semiconductor integrated device manufacturer, from August 1994 to December 1995 where he was responsible for the embedded memory design division. Before he joined LSI Logic, Mr. Kablanian managed multi-foundry technology transfer programs as an engineering manager at Waferscale Integration, a designer of programmable system devices, from April 1990 to January 1994. Mr. Kablanian holds a B.A. in Physics from the University of California at Berkeley and an M.S. in Electrical Engineering from Santa Clara University.

     Alexander Shubat co-founded Virage Logic and has served as our Vice President of Research and Development and Chief Technical Officer and as a Director since January 1996. Before co-founding Virage Logic, Dr. Shubat served as Director of Engineering at Waferscale Integration from November 1985 to December 1995, where he managed various groups, including design, application-specific integrated circuit and high-speed memory. He holds fourteen patents and has contributed to more than 25 publications. Dr. Shubat holds a B.S. and an M.S. in Electrical Engineering from the University of Toronto, Canada and a Ph.D. in Electrical Engineering from Santa Clara University.

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     James R. Pekarsky has served as our Vice President of Finance and Chief Financial Officer since May 1999. In October 2003, Mr. Pekarsky tendered his resignation effective mid-November 2003 to pursue other opportunities. Before joining Virage Logic, Mr. Pekarsky served as Director, General Manager in several divisions at Mentor Graphics, where he worked from May 1997 to May 1999, including Mentor Graphics’ Emulation Division in Paris, France and Embedded Software Division in San Jose, California. Before joining Mentor Graphics, Mr. Pekarsky served as the Director of Operations of Advanced Molecular Systems, a genetics research company, from December 1995 to May 1997. Before that, Mr. Pekarsky held senior management positions in finance and operations at Sclavo Diagnostics, a clinical diagnostic company in Milan, Italy, and Bio-Rad Laboratories, a life science research company. Mr. Pekarsky holds a B.S. in Accounting from Indiana University of Pennsylvania and an M.B.A. in Finance from Golden Gate University.

     Raymond T. Leung has served as our Vice President of Engineering since August 1998. Before joining Virage Logic, Mr. Leung was Senior Director of Mixed Signal Development at LSI Logic where he worked from June 1989 to August 1998. He also managed the embedded memory development group at LSI Logic and holds two patents on memory design techniques. Mr. Leung holds a B.S. in Electrical Engineering from Columbia University and an M.S. in Electrical Engineering from Stanford University.

     Raj Singh has served as our Vice President of Worldwide Sales since March 2002. Before joining Virage Logic, Mr. Singh was Executive Vice President and General Manager and previously, Vice President of Worldwide Sales at 3Dlabs where he worked from April 1994 to March 2002. From February 1989 to March 1994, Mr. Singh held various positions with Dupont including Business Manager and Vice President of its Dupont Pixel operation. Mr. Singh holds a B.A. and an M.A. in English literature from Kings College, Aberdeen University of Scotland.

     James J. Ensell, joined Virage Logic as our Vice President of Marketing in October 2003. Before joining Virage Logic, Mr. Ensell served as Vice President, Business Development and Chief Information Officer for fabless custom integrated circuit maker eSilicon from August 2000 to October 2003. Before joining eSilicon, Mr. Ensell held positions as Senior Vice President of Products and Services at Zland, an internet eBusiness provider, from July 1999 to August 2000, and served as Vice President of Marketing at Cadence Design Systems’ Deep Submicron Business Unit from April 1997 to January 1999. Mr. Ensell also serves as chairman of the IP Committee of the Fabless Semiconductor Association (FSA). Mr. Ensell holds a B.S. in Electrical Engineering from Villanova University and an M.S. in Electrical Engineering from the University of Pennsylvania.

     Yervant Zorian served as a Director from November 1997 to March 2001 and joined our management team as Vice President and Chief Scientist in May 2000. From November 1996 to June 2000, Dr. Zorian served as Chief Technical Advisor of LogicVision. Before that Mr. Zorian served as a Distinguished Member of the Technical Staff at Lucent Technologies, Bell Laboratories. Since August 2000, Dr. Zorian has served as a board member of HPL Technologies, Inc. Dr. Zorian holds a B.S. in Electrical Engineering from the University of Aleppo in Syria, an M.Sc. in Computer Engineering from the University of Southern California and a Ph.D. in Electrical Engineering from McGill University.

     William J. Palumbo has served as our Vice President and General Manager of New Jersey Operations since July 1999. Before joining Virage Logic, Mr. Palumbo served as Director of the Physical Library Division for Mentor Graphics from October 1990 to July 1999. Before joining Mentor Graphics, Mr. Palumbo worked in various management positions at RCA, General Electric and Harris Semiconductor from December 1983 to September 1990. Mr. Palumbo holds one U.S. patent and has published numerous articles in technical and business forums. Mr. Palumbo holds a B.S. in Electrical Engineering from Rutgers University.

     Greer Person has served as our Vice President of Business Development since July 2003. Before joining Virage Logic, Mr. Person served as Senior Director and Head of Business Development at LSI Logic from November 2000 to July 2003, as Director of Business Development from June 1998 to November 2000, and previously in Product Line Management and Marketing Management for LSI Logic from August 1993 to February 1998. Before joining LSI Logic, Mr. Person held several engineering and operations management positions at Intergraph Corporation. Mr. Person holds a BSEE from the University of Mississippi and an M.B.A. from Santa Clara University.

     Kenneth V. Rousseau has served as our Vice President of Software Development since February 2000. Before joining Virage Logic, Dr. Rousseau was Director of New Product Management at Synopsys, Inc., a supplier of

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electronic design automation tools. Before joining Synopsys, he held various positions at Cascade Design Automation, another supplier of electronic design automation tools, including Chief Technologist from August 1996 to December 1996, Vice President, Engineering from August 1994 to August 1996, Manager, Design Technologies from June 1993 to August 1994 and Engineering Fellow from January 1993 to June 1993. He also worked in the aerospace industry at Hughes Aircraft and TRW Electronics and Defense, as well as several semiconductor companies including GigaBit Logic and Vitesse. Dr. Rousseau holds a B.S. in Physics and Literature and an M.S. in Applied Physics from the California Institute of Technology and a Ph.D. in Electrical Engineering from UCLA.

     Alok Singh has served as our Vice President and General Manager of India Operations since September 1997. Before joining Virage Logic, Mr. Singh served as Director of Design Automation from November 1996 to August 1997 and Manager, Design Automation from April 1990 to October 1996 at Waferscale Integration. Mr. Singh holds a B.S. in Electrical Engineering from the University of Glasgow, Scotland.

Item 2. Properties

Facilities

     In October 2002, our principal administrative, sales, marketing and research and development facility moved to a new building in Fremont, California and occupies approximately 61,500 square feet. This facility is leased through August 2004. We also lease additional offices in Bellevue, Washington and Clinton, New Jersey that are occupied mainly by research and development and engineering personnel. The Bellevue office, which occupies approximately 4,100 square feet, is leased through March 2005. The Clinton office, which occupies approximately 10,900 square feet, is leased through July 2005. In addition, we have development centers in Armenia and India. In September 2003, our development center in Armenia moved into our new building owned by us. The office space is approximately 40,000 square feet and the total cost of the building and leasehold improvements is approximately $1.9M. The development center in India is located in Noida, near Delhi, and occupies approximately 26,000 square feet in a building leased through July 2004.

Item 3. Legal Proceedings

     None

Item 4. Submission of Matters to a Vote of Security Holders

     None

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PART II

Item 5. Market for Registrant’s Common Equity and Related Stockholder Matters.

Market Price and Dividends on Virage Logic Common Stock

     Virage Logic Corporation’s common stock is traded on the Nasdaq National Market under the symbol “VIRL” since our initial public offering on August 1, 2000. The following table sets forth, for the periods indicated, the high and low closing prices for the common stock as reported on the Nasdaq National Market.

     As of October 31, 2003, there were approximately 97 stockholders of record of our common stock.

     The Company has never paid or declared any cash dividends on our common stock or other securities and does not anticipate paying cash dividends in the foreseeable future.

Equity Compensation Plan Information

     The equity compensation plan information required to be provided in this Annual Report on Form 10-K is incorporated by reference to the Company’s proxy statement for the 2004 Annual Meeting of Stockholders to be filed with the Securities and Exchange Commission within 120 days after the end of our fiscal year ended September 30, 2003.

Recent Sales of Unregistered Securities

     In June 2003, we sold 50,000 shares of common stock to a licensor at $4.00 per share following the exercise of a warrant issued in July 1999. There were no underwriters employed in connection with this transaction. The issuance of the common stock was deemed to be exempted from registration under the Securities Act of 1933 in reliance on Section 4(2) of the Securities Act and Regulation D promulgated thereunder as a transaction by an issuer not involving a public offering.

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Item 6. Selected Consolidated Financial Data.

     The selected consolidated financial data set forth below should be read together with “Management’s Discussion and Analysis of Financial Condition and Results of Operations” and our consolidated financial statements and the notes thereto included elsewhere in this filing. The consolidated statement of operations data for each of the fiscal years ended September 30, 2003, 2002 and 2001 and the consolidated balance sheet data at September 30, 2003 and 2002 have been derived from our audited consolidated financial statements included elsewhere in this filing. The consolidated statement of operations data for the fiscal years ended September 30, 2000 and 1999 and the consolidated balance sheet data at September 30, 2001, 2000 and 1999 have been derived from our audited consolidated financial statements not included in this filing. The historical financial information may not be an accurate indicator of our future performance.

SELECTED CONSOLIDATED FINANCIAL DATA

(1)

Fiscal 2002 and 2003 results included the impact of revenues and expenses from the operations of In-Chip Systems, Inc. subsequent to its acquisition. See Note 9 of the Notes to Consolidated Financial Statements for discussion of the acquisition of In-Chip Systems, Inc., which was consummated on May 24, 2002.

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     Item 7. Management’s Discussion and Analysis of Financial Condition and Results of Operations

     The following discussion of our financial condition and results of operations should be read together with the consolidated financial statements and the notes thereto included elsewhere in this filing.

Overview

     Virage Logic Corporation provides semiconductor IP (semiconductor IP) platforms based on memory, logic, I/Os (input/output interface components) and IP development tools that are silicon proven and production ready. These various forms of IP are utilized by our customers to design and manufacture system-on-a-chip (SoC) integrated circuits that power today’s Internet and high-speed communications, computer and consumer products, such as cellular and digital phones, pagers, PDAs, digital cameras, DVD players, switches and modems.

     Our revenues are derived principally from licenses of our semiconductor IP products, which include:

	•		embedded memories, logic and I/O elements;
	•		standard and custom memory compilers;
	•		memory test processor and fuse box components for embedded test and repair of defective memory cells;
	•		software development tools.

     We also derive revenues from royalties, custom design services, maintenance services and library development and consulting services related to license of logic components. Our revenues are reported in two separate categories: license revenues and royalty revenues. License revenues are derived from license fees, maintenance fees, fees for custom design services, library design services and consulting services. Royalty revenues are derived from fees paid by a customer or a third-party foundry based on production volumes of wafers containing chips utilizing our semiconductor IP technologies.

     The license of our semiconductor IP typically covers a range of embedded memory, logic and I/O products. Licenses of our semiconductor IP products can be either perpetual or term-based. In addition, maintenance can be purchased for both types of licenses.

     We derive our royalty revenues from third-party foundries that manufacture chips incorporating our Area, Speed and Power (ASAP) memory products for our fabless customers, and from integrated device manufacturers and fabless customers that utilize our STAR Memory System™, NetCAM™ and NOVeA™ technologies. Royalty payments are in addition to the license fees we collect from our customers, and are calculated based on production volumes of wafers containing chips utilizing our semiconductor IP technologies based on a rate per-chip or rate per-wafer depending on the terms of the respective license agreement. Royalty revenues are generally determined and recognized one quarter in arrears, when a production volume report is received from the customer or foundry. Time delays for receiving royalty revenues are due to the typical length of time required for the customer to implement our semiconductor IP into their design, and then to manufacture and bring to market a product incorporating our products.

     Currently, license fees represent a significant portion of our revenues. Royalty revenues for the years ended September 30, 2003, 2002 and 2001 were $3.5 million, $1.7 million and $1.0 million, respectively.

     Amounts invoiced to our customers in excess of recognized revenues are recorded as deferred revenues. The timing and amounts invoiced to customers can vary significantly depending on specific contract terms and can therefore have a significant impact on deferred revenues in any given period.

     We have been dependent on a limited number of customers for a substantial portion of our annual revenues, although that dependence continues to decrease. Our customers comprising the top 10 customer group have changed from time to time. In fiscal 2003 and 2002, no single customer generated more than 10% of our revenues. In fiscal 2001, Philips Electronics and Intel Corporation generated 12% and 14% of our revenues, respectively.

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     Sales to customers located outside North America accounted for 52%, 44% and 42% of our revenues in fiscal 2003, 2002 and 2001, respectively. Substantially all of our direct sales representatives and field application engineers are located in North America and Europe and serve those regions. In Japan and the rest of Asia, we use both indirect sales through distributors and direct sales through sales representatives. All revenues to date have been denominated in U.S. dollars.

Critical Accounting Policies

     The preparation of financial statements in accordance with accounting principles generally accepted in the United States of America requires that we make estimates and judgments, which affect the reported amounts of assets, liabilities, revenues and expenses, and related disclosures of contingent assets and liabilities. We continually evaluate our estimates, including those related to bad debts, investments, intangible assets, income taxes, and contingencies such as litigation. We base our estimates on historical experience and other assumptions that we believe are reasonable under the circumstances. Actual results may differ from these estimates under different assumptions or conditions.

     We have identified the following as critical accounting policies to our company:

	•		revenue recognition
	•		valuation of accounts receivable
	•		valuation of long-lived assets and investments
	•		valuation of purchased intangibles, including goodwill
	•		accounting for stock options
	•		income taxes.

Revenue Recognition

     Our revenue recognition policy uses specific and detailed guidelines and is based on the American Institute of Certified Public Accountants Statement of Position 97-2, “Software Revenue Recognition” as amended by Statement of Position 98-4, Statement of Position 98-9 and Statement of Position 81-1.

     Revenues from perpetual licenses for our semiconductor IP products are generally recognized when persuasive evidence of an agreement exists, delivery of the product has occurred, there are no significant remaining obligations on our part, the fee is fixed or determinable, and collectability is reasonably assured. If any of these criteria are not met, we defer recognizing the revenue until such time as all criteria are met. Revenues from term-based licenses, which are generally twelve months in duration, in which no maintenance is purchased, are recognized ratably over the term of the license, provided the criteria mentioned above are met.

     License of custom memory compilers and logic libraries may involve customization to the functionality of the software, therefore revenues from such licenses are recognized over the period that we perform services. Revenues derived from library development services are recognized using a percentage-of-completion method, and revenues from technical consulting services are recognized as the services are performed. For all license and service agreements accounted for using the percentage-of-completion method, we determine progress-to-completion based on labor hours incurred. We believe we are able to reasonably and reliably estimate the costs to complete projects accounted for using the percentage-of-completion method. Alternatively, for customers’ transactions for which we can not reasonably and reliably estimate the costs to complete a project, the completed contract method of accounting is used, such that costs are deferred until the project is completed at which time revenues are recognized. A provision for estimated losses on engagements is made in the period in which the loss becomes probable and can be reasonably estimated. Costs incurred in advance of billings are recorded as costs in excess of related billings on in-process contracts. If customer acceptance is required for completion of specified milestones, the related revenue is deferred until the acceptance criteria is met.

     For agreements which include multiple elements, we recognize revenues attributable to delivered or completed elements covered by such agreements when such elements are completed or delivered. The amount of such revenues is determined by deducting the aggregate fair value of the undelivered or uncompleted elements, which we determine by

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each such element’s vendor-specific objective evidence of fair value, from the total revenues recognizable under such agreement. Vendor specific objective evidence of fair value of each element of an arrangement is based upon the normal pricing for such licensed product and service when sold separately, and for maintenance, it is determined based on the stated renewal rate in each contract. Revenues are recognized once we deliver the element identified as having vendor-specific objective evidence or once we complete the provision of the services. Maintenance revenues are recognized ratably over the contractual term of the maintenance period, which is generally one year.

     Amounts invoiced to our customers in excess of recognized revenues are recorded as deferred revenues. The timing and amounts invoiced to customers can vary significantly depending on specific contract terms and can therefore have a significant impact on deferred revenues in any given period.

     Royalty revenues are generally determined and recognized one quarter in arrears, when a production volume report is received from the customer or foundry, and are calculated based on production volumes of wafers containing chips utilizing our semiconductor IP technologies based on a rate per-chip or rate per-wafer depending on the terms of the respective license agreement.

     While we believe our estimates used in calculating percentage-of-completion for certain agreements involving customization are reasonable, different assumptions could materially affect the timing of our revenue recognition.

Valuation of Accounts Receivable

     We perform ongoing credit evaluations of our customers and adjust customers’ credit limits based upon payment history and the customer’s current credit worthiness, as determined by our review of their then-current credit information. We continuously monitor collections and payments from our customers and maintain an allowance for estimated credit losses based upon our historical experience and any specific customer collection risks that we have identified. While such credit losses have historically been within our expectations and the allowance we have established, we cannot guarantee that we will continue to experience the same credit loss rates that we have in the past. Since our accounts receivable are concentrated in a relatively small number of customers, a significant change in the liquidity or financial position of any one of these customers could have a material adverse impact on the quality of our accounts receivables and our future operating results.

Valuation of Long-Lived Assets and Investments

     We periodically review the carrying value of our long-lived assets and investments for continued realizability. This review is based upon our projections of anticipated future cash flows from such assets and investments. While we believe that our estimates of future cash flows are reasonable, different assumptions regarding such cash flows could materially affect our evaluations, which could result in an impairment charge.

Valuation of Purchased Intangibles, Including Goodwill

     We periodically evaluate purchased intangibles, including goodwill, for impairment. An assessment of goodwill is subjective by nature, and significant management judgment is required to forecast future operating results, projected cash flows and current period market capitalization levels. If our estimates or related assumptions change in the future, these changes in conditions could require material write-downs of net intangible assets, including impairment charges for goodwill. In connection with the acquisition of In-Chip Systems Inc., the valuation of intangible assets was based on management’s estimates. Such estimates included cash flow projections, discount rates and estimated life of technology, which management believes are reasonable under the circumstances. Use of other estimates or assumptions may have resulted in a different valuation for such intangible assets acquired leading to changes in recorded asset values. Intangible assets with finite useful lives are amortized over the estimated life of each asset. As of September 30, 2003, management believes no impairment of intangible assets has occurred.

Accounting for Stock Options

     We account for outstanding stock options under Accounting Principles Board (APB) Opinion No. 25, “Accounting for Stock Issued to Employees” (APB 25) and Financial Accounting Standards Board Interpretation

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No. 44 (FIN 44), and comply with the disclosure provisions of SFAS No. 123, “Accounting for Stock-Based Compensation” (SFAS 123). In accordance with APB 25, we do not recognize compensation expense for options granted to employees as all employee options are granted with an exercise price equal to the fair market value of the underlying stock.

     The Company accounts for stock options or warrants granted to non-employees, excluding non-employee directors, under SFAS 123 and EITF Issue No. 96-18, “Accounting for Equity Instruments with Variable Terms that are Issued for Consideration Other Than Employee Services under SFAS 123.” We record the expense of such services based upon the estimated fair value of the equity instrument using the Black-Scholes pricing model. Assumptions used to value the equity instruments are consistent with equity instruments issued to employees. We charge the value of the equity instrument to earnings over the term of the service agreement. At the time all non-employee options and warrants were valued, the instruments were immediately exercisable and there were no ongoing obligations from the holders. Expenses recorded for stock options granted to non-employees for the years ended September 30, 2003, 2002 and 2001 were $790,000, $635,000 and $141,000, respectively.

     We make estimates and assumptions for the inputs used in the fair value calculation. Material differences in amounts of expense may result if different estimates and assumptions are used.

Income taxes

     We record the estimated future tax effects of temporary differences between the tax bases of assets and liabilities and amounts reported in the accompanying consolidated balance sheets. These differences resulted in deferred tax assets of $2.9 million at September 30, 2003. The carrying value of the company’s net deferred tax assets assumes that we will be able to generate sufficient future taxable income in certain tax jurisdictions, based on estimates and assumptions. Management evaluates the recoverability of the deferred tax assets and assesses the need, if any, for additional valuation allowances. Taxes payable was $309,000 and $2.0 million at September 30, 2003 and 2002, respectively.

Results of Operations — Years Ended September 30, 2003, 2002 and 2001

     The following table lists the percentage of revenues for certain items in our consolidated statements of operations for the periods indicated:

     Total revenues in fiscal 2003, 2002 and 2001 were as follows:

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     Revenues declined $4.9 million from 2002 to 2003 and increased $13.8 million from 2001 to 2002. The 2003 decline in revenues was due to a decline in license revenues, partially offset by an increase in royalties. The 2002 increase in revenues was the result of increases in license revenues and royalties.

     License revenues declined $6.8 million from 2002 to 2003 and increased $13.2 million from 2001 to 2002. The 2003 decrease in license revenues was primarily due to fewer project design starts by fabless semiconductor customers on the 0.13 micron technology as evidenced by the decrease in sales of the 0.13 micron technology from 56% to 53% of total revenues from 2002 to 2003, the slow-down in projected industry adoption of the 90-nanometer technology as evidenced by the decrease in sales of the 90-nanometer technology from 12% to 7% of total revenues from 2002 to 2003, and entering into agreements with select IDM customers, who have purchased a full suite of products, which include higher future royalties in exchange for lower upfront license fees. The 2002 increase in license revenues was primarily due to increased sales of our embedded memory products and their different geometry variations, which included the continued sale of 0.13 micron embedded memory technologies, the introduction of the 90-nanometer technology and the introduction of logic products following our acquisition of In-Chip.

     Royalties increased $1.8 million from 2002 to 2003 and $637,000 from 2001 to 2002. The 2003 increase was due to increased royalties from foundries as a result of higher manufacturing volumes, entry of higher number of products into production incorporating our IP and the receipt of our first wafer-based royalties directly from customers using our STAR Memory System product family that was expanded in fiscal 2002. The 2002 increase was due to increased royalties from foundries as a result of increased entry of products into production incorporating our IP and higher manufacturing volumes.

     For the year ended September 30, 2003, 2002 and 2001, revenues by geography and geometry are as follows:

     We have experienced increased revenues from Asia year over year as we continued to build customer relationships and engaged with two additional foundries in that region. Sales to Canada and EMEA were lower in fiscal 2003 as compared to fiscal 2002 due to the timing of certain customer orders and the limited number of customers in those regions. Sales to the United States were lower in fiscal 2003 as compared to fiscal 2002 due to the extended poor economic environment in the U.S. semiconductor industry. Sales in all regions were higher in 2002 then 2001 due to an expanded customer base.

     Cost of revenues in fiscal 2003, 2002 and 2001 were as follows:

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     Cost of revenues consists primarily of personnel expenses and the allocation of facilities and equipment expenses. Cost of revenues increased 2% from 2002 to 2003 and 42% from 2001 to 2002. The slight increase between 2002 and 2003 was due to increased labor and overhead expenses, which could not be redeployed in a timely manner to research and development projects. The increase between 2001 and 2002 was primarily due to personnel expenses of $1.4 million associated with greater engineering resources necessary to design and deliver products to meet the increase in sales volume in 2002, an increase in depreciation of $0.3 million related to purchases of computer hardware and software and an increase of $0.4 million related to purchases of software license and maintenance. Cost of revenues as a percentage of revenues was 23%, 20% and 20% for fiscal year 2003, 2002 and 2001, respectively. The increase in cost of revenues as a percentage of revenues from 2002 to 2003 was attributable to lower than anticipated revenues year-over-year and the inability to make timely redeployments of engineering resources between engineering and research and development projects. Cost of revenues excludes $255,000, $986,000 and $1.4 million of amortization of stock-based compensation for the years ended September 30, 2003, 2002 and 2001, respectively.

     Research and development expenses fiscal 2003, 2002 and 2001 were as follows:

     Research and development expense increased 42% from 2002 to 2003 and 37% from 2001 to 2002. The increase in research and development expense from 2002 to 2003 was due to personnel and related expenses of $3.1 million, much of which was associated with the scaling of a logic engineering organization, as well as an increase of $1.3 million in software license and maintenance fees. Headcount increased in 2003 to 135 at fiscal year end from 110 the prior year. The increase in research and development expense between 2001 and 2002 was primarily due to a $2.1 million increase resulting from an increase in the number of employees from 79 to 110 who are involved in research and development as we expanded our product offerings, the development of the 90 and 65 nanometer embedded memory technology, an increase in depreciation of $0.5 million related to capital spending for both computer hardware and software, and purchases of software license and maintenance of $0.6 million. Research and development expense as a percentage of revenues was 46% in fiscal 2003, up from 29% in fiscal 2002 due to the 90-nanometer process research and development effort as well as the redeployment of engineering capacity from cost of revenue activities to research and development projects involving expanded product variations for our technology. Research and development expense excludes $499,000, $1.4 million and $2.1 million of amortization of stock-based compensation for the years ended September 30, 2003, 2002 and 2001, respectively.

     Sales and marketing expenses in fiscal 2003, 2002 and 2001 were as follows:

     Sales and marketing expense increased 11% from 2002 to 2003 and 39% from 2001 to 2002. The increase in sales and marketing expense in 2003 was primarily due to costs of hiring additional personnel of $0.9 million and increased consulting expenses of $0.3 million related to market research. In 2002, the increase was primarily due to the cost of hiring additional personnel of $2.5 million and increased sales commissions of $0.5 million. The number of employees increased from 51 to 57 from 2002 to 2003 and 40 to 51 from 2001 to 2002 in sales and marketing. Sales and marketing as a percentage of revenues was 31% in fiscal 2003, up from 25% in fiscal 2002. The increase in expenses as a percentage of revenues resulted from our decision to maintain spending on advertising and promotional activities at the same level as in fiscal 2002 and our decreased revenues. Sales and marketing expense excludes $322,000, $1.3 million and $1.9 million of amortization of stock-based compensation for the years ended September 30, 2003, 2002 and 2001, respectively.

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     General and administrative expenses in fiscal 2003, 2002 and 2001 were as follows:

     General and administrative expense decreased 6% from 2002 to 2003 and increased 18% from 2001 to 2002. The decrease in general and administrative expense between 2002 and 2003 was primarily the result of reduced bad debt expense of $0.5 million. The increase in general and administrative expense between 2001 and 2002 was primarily the result of increased professional service costs of $0.4 million, principally for legal advisory and accounting services associated with corporate governance and work related to acquisition plans that were not pursued. The number of employees decreased from 14 to 13 from 2002 to 2003 and increased from 12 to 14 from 2001 to 2002. General and administrative expense excludes $128,000, $579,000 and $1.0 million of amortization of stock-based compensation for the years ended September 30, 2003, 2002 and 2001, respectively.

     Stock-Based Compensation. With respect to the grant of stock options and restricted stock to employees, our balance sheet reflects an aggregate deferred stock-based compensation of approximately $130,000 and $3.3 million for the years ended September 30, 2003 and 2002. The amount of deferred stock-based compensation is presented as a reduction of stockholders’ equity and is being amortized under the multiple option approach, which results in recognizing expense on an accelerated basis over the vesting period of the applicable options, generally four years. Amortization, net of cancellations, was $1.2 million, $4.2 million and $6.3 million for the years ended September 30, 2003, 2002 and 2001, respectively.

     Interest Income. Interest income was $812,000, $1.2 million and $3.2 million for the years ended September 30, 2003, 2002 and 2001, respectively. Interest income has continued to decrease due to the declining interest rate environment.

     Interest and Other Expenses. Interest and other expenses resulted in a net other expense of $73,000, $81,000 and $62,000 for the years ended September 30, 2003, 2002 and 2001, respectively. The net other expense in 2003 primarily includes interest expense paid on capital leases of $58,000. Net other expense in 2002 primarily includes interest expense paid on remaining capital leases of $49,000.

     Income Tax Provision. For fiscal 2003, we recorded an income tax benefit of $1.5 million on a pre-tax loss of $5.4 million, yielding an effective tax rate of 28%. For fiscal 2002, we recorded a provision for income taxes of $2.3 million on a pre-tax income of $2.5 million, yielding an effective tax rate of 91%. For fiscal 2001 we recorded a provision for income taxes of $1.9 million on a pre-tax loss of $115,000, yielding an effective tax rate of (1686%). The rates differ from the U.S. statutory rates primarily due to the impact of stock-based compensation related charges that are non-deductible for tax purposes, as well as in-process research and development charges for fiscal 2002. The change in the effective tax rate from fiscal 2002 to fiscal 2003 is primarily the result of the company’s pre-tax loss due to lower than expected revenues in fiscal 2003 after its pre-tax income of $2.5 million in fiscal 2002. The change in the effective tax rate from fiscal 2001 to fiscal 2002 is primarily the result of an increase in the Company’s pre-tax earnings from a nearly break-even point in fiscal 2001 to pre-tax income of $2.5 million in fiscal 2002.

Liquidity and Capital Resources

     At September 30, 2003, we had $38.9 million in cash and cash equivalents, an increase of $3.5 million from cash and cash equivalents held at September 30, 2002. The increase in cash balances at September 30, 2003 was due primarily to the maturity of short-term government securities. We also held $20.1 million in investments at September 30, 2003, as compared to $24.0 million at September 30, 2002. In fiscal 2003 and 2002, operations were funded primarily from revenues received. The Company financed operating losses up to fiscal 2001 through borrowing under capital leases, the sale of preferred stock and cash proceeds of $50.7 million from our August 2000 initial public offering.

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     Net cash provided by operating activities was $2.9 million, $8.5 million and $1.2 million for fiscal 2003, 2002 and 2001, respectively. Net cash provided by operating activities resulted from a net loss of $3.9 million in fiscal 2003, adjusted for non-cash charges associated with depreciation and amortization of $3.8 million and the amortization of stock-based compensation of $1.2 million. A focus on collection and reduced revenue levels from 2002 to 2003 led to significant decreases in accounts receivable of $5.2 million partially offset by increases in prepaid expenses of $1.3 million resulting from purchases of software maintenance, a decrease in income taxes payable of $1.7 million due to the Company’s loss position and a decrease in accrued expenses of $0.5 million due to timing of payments. Days sales outstanding for the fiscal fourth quarter, based on revenues of $9.9 million and accounts receivable of $10.5 million, was 95, down from 108 days in the fourth quarter of fiscal 2002. The decrease is primarily due to improving collections efforts. In fiscal 2002, net cash provided by operating activities resulted from net income of $225,000, adjusted for non-cash charges associated with depreciation and amortization of $3.9 million and the amortization of stock-based compensation of $4.2 million. The increase in cash provided by operating activities from 2001 to 2002 is due to decreases in income tax receivable of $1.6 million for the receipt of tax refunds received during the year resulting from tax credits and differences in timing of payments, increases in accrued payroll and related expenses of $1.4 million due to increased headcount from 202 to 284 employees, an increase in deferred revenues of $1.9 million from greater deferred maintenance revenue and an increase in income tax payable of $2.0 million from continued earnings growth and a reduction of the amount of amortization of stock-based compensation. The increase in cash provided from operating activities from 2001 to 2002 was partially offset by increases in accounts receivable of $5.7 million related to higher revenues, prepaid expenses of $590,000 related to purchases of software maintenance and deferred tax assets of $1.7 million. Days sales outstanding for the fiscal fourth quarter of 2002, based on revenues of $13.1 million and accounts receivable of $15.7 million, was 108, up from 98 days in the fourth quarter of fiscal 2001. The increase is primarily due to some large milestone shipments in agreements with integrated device manufacturers late in the year. In fiscal 2001, net cash provided by operating activities resulted from a net loss of $2.1 million adjusted for non-cash charges associated with depreciation and amortization of $2.7 million and the amortization of stock-based compensation of $6.3 million, partially offset by increases in accounts receivable, prepaid expenses, taxes receivable and deferred revenues.

     Net cash used in investing activities was $995,000, $2.0 million and $33.3 million for fiscal 2003, 2002 and 2001, respectively. The decrease in cash used for investing activities from 2002 to 2003 is due primarily to reduced treasury investment activity as a result of lower interest rates leading to net maturities of our investments in government securities of $4.5 million and no significant technology investment or merger and acquisition activity. The decrease in cash used for investing activities from 2001 to 2002 is due primarily to the disposition of the investment in Atmos Corporation and the net maturities of our investments in government securities, offset by the acquisition of In-Chip Systems, Inc. and acquisitions of property and equipment, primarily computer software and hardware. We intend to purchase approximately $4.0 million of additional capital assets, primarily computer equipment and software, during fiscal 2004.

     Net cash provided by financing activities was $1.6 million, $1.0 million and $1.3 million for fiscal 2003, 2002 and 2001, respectively. Net cash provided by financing activities in fiscal 2003 primarily reflects proceeds from the issuance of common stock of approximately $1.7 million. In 2002, the proceeds from issuance of common stock totaling $1.6 million and the repayment of notes payable by stockholders of $1.0 million further contributed to the net cash provided but was offset by the repayment to stockholder of $1.5 million.

     Our future capital requirements will depend on many factors, including the rate of sales growth, market acceptance of our existing and new technologies, the amount and timing of research and development expenditures, the timing of the introduction of new technologies, expansion of sales and marketing efforts, potential acquisitions, levels of working capital, primarily accounts receivable. There can be no assurance that additional equity or debt financing, if required, will be available on satisfactory terms. We believe that our current capital resources and cash generated from operations will be sufficient to meet our needs for at least the next twelve months, although we may seek to raise additional capital during that period and there can be no assurance that we will not require additional financing beyond this time frame.

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     The following table summarizes our contractual obligations:

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Quarterly Results of Operations

     The following tables contain unaudited consolidated statement of operations data for our eight most recent quarters. The first table contains revenue and expense data expressed in dollars, while the second table contains the same data expressed as a percentage of our revenues for the periods indicated. This data has been derived from unaudited consolidated financial statements that, in our opinion, include all adjustments necessary for a fair presentation of the information. Our quarterly results have been in the past, and in the future may be, subject to fluctuations. As a result, we believe that results of operations for the interim periods may not be an accurate indicator of results for any future period.