ALTERA CORP - 10-K Annual Report

Indicate by check mark whether the registrant: (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days. Yes x No o

Indicate by check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of registrant’s knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K. o

Indicate by check mark whether the registrant is an accelerated filer (as defined in Exchange Act Rule 12b-2). Yes x No o

The aggregate market value of the registrant’s common stock held by non-affiliates of the registrant was approximately $3,790,000,000 as of June 28, 2002, based upon the closing sale price on the Nasdaq National Market for that date. For purposes of this disclosure, shares of common stock held by persons who hold more than 5% of the outstanding shares of common stock and shares held by executive officers and directors of the registrant have been excluded because such persons may be deemed affiliates. This determination is not necessarily conclusive.

There were 382,148,741 shares of the registrant’s common stock issued and outstanding as of February 18, 2003.

Item 6 of Part II incorporates information by reference from the Annual Report to Stockholders for the fiscal year ended December 31, 2002.

Items 10, 11, 12, and 13 of Part III incorporate information by reference from the Proxy Statement for the Annual Meeting of Stockholders to be held on May 6, 2003.

This report contains forward-looking statements, which are provided under the “safe harbor” protection of the Private Securities Litigation Reform Act of 1995. Forward-looking statements are generally written in the future tense and/or are preceded by words such as “will,” “may,” “should,” “could,” “expect,” “suggest,” “believe,” “anticipate,” “intend,” “plan,” or other similar words. Forward-looking statements include statements regarding (1) our gross margins and factors that affect gross margins, such as the costs of raw materials, our ability to absorb manufacturing costs, trends in selling prices, and the sale of previously reserved inventory; (2) our research and development efforts; (3) the commercial success of our new products; (4) trends in future sales; (5) the availability of cash to finance operations; (6) our ability to hold our fixed income investments until maturity; and (7) future economic conditions.

Forward-looking statements are not guarantees of future performance and involve risks and uncertainties. The forward-looking statements contained in this report are based on information that is currently available to us and expectations and assumptions that we deem reasonable at the time the statements were made. We do not undertake any obligation to update any forward-looking statements in this report or in any of our other communications, except as required by law. All such forward-looking statements should be read as of the time the statements were made and with the recognition that these forward-looking statements may not be complete or accurate at a later date.

Many factors may cause actual results to differ materially from those expressed or implied by the forward-looking statements contained in this report. These factors include, but are not limited to, those risks set forth under “Management’s Discussion and Analysis of Financial Condition and Results of Operations—Risk Factors.”

Founded in 1983 and reincorporated in Delaware in 1997, Altera Corporation designs, manufactures, and markets (1) high-performance, high-density programmable logic devices, or PLDs; (2) pre-defined design building blocks known as intellectual property, or IP, cores; and (3) associated development tools. Our PLDs, which consist of field-programmable gate arrays, or FPGAs, and complex programmable logic devices, or CPLDs, are semiconductor integrated circuits that are manufactured as standard chips that our customers program to perform desired logic functions within their electronic systems. Our customers can license IP cores from us for implementation of standard functions in their PLD designs. Customers develop, compile, verify, and program their PLD designs using our proprietary development software, which operates on personal computers and engineering workstations.

We were one of the first suppliers of complementary metal oxide semiconductor, or CMOS, PLDs and are currently a global leader in this market. Today, we offer a broad range of PLDs that offer unique features as well as differing densities and performance specifications. Our products serve a wide range of markets, including telecommunications, data communications, computing and storage, consumer, and industrial applications. Some of our major products are more fully described below.

Our headquarters facility is located at 101 Innovation Drive, San Jose, California 95134, and our website is www.altera.com. Our common stock trades on the Nasdaq National Market under the symbol “ALTR.”

Three principal types of digital integrated circuits are used in most electronic systems: (1) processors, (2) memory, and (3) logic.


	•	Processors, which include microprocessors, microcontrollers, and digital signal processors, or DSPs, are typically used for control and central computing tasks;

	•	Memory is used to store programming instructions and data; and

	•	Logic is typically used to manage the interchange and manipulation of digital signals within a system.

While system designers employ a relatively small number of standard architectures to meet their processor and memory needs, they require a wide variety of logic circuits to differentiate their end products. In addition, competitive pressures force

customers to reduce the size of their products and accelerate their products’ introduction to market. At the same time, as new technologies evolve, customers require even more logic complexity on a single chip for improved functionality, performance, reliability, and cost.

The majority of the CMOS logic market is made up of application-specific integrated circuits, or ASICs. The ASIC segment of the CMOS logic market is comprised of (1) programmable logic, (2) gate arrays, and (3) cell-based integrated circuits, also referred to as standard cells. In a broad sense, all of these devices are competitive with each other as they generally may be used in the same types of applications in electronic systems. However, differences in cost, performance, density, flexibility, ease of use, and time to market dictate the extent to which they may be directly competitive for particular applications.

A primary advantage of programmable logic over gate arrays and standard cells is that it allows for shorter design cycles, meeting customers’ needs for quick time to market. In contrast to gate array and standard cell users, PLD users program their design directly into the PLD and can have custom chips that are fully functioning and verified at the time the design is completed. As a result of user programmability, PLD customers may experiment and revise their designs in a relatively short amount of time and with minimum development cost. The time-to-market advantage of PLDs is complemented by the added benefit of field upgradeability, which generally enables PLD users to modify the PLD design after the customer’s electronic system has been shipped.

Due to their programmability, however, PLDs generally have a larger die size and associated higher per-unit cost when compared to standard cells and gate arrays, which are customized during manufacturing at the chip fabrication facility and hence have a fixed function. While the customized manufacturing of standard cells and gate arrays can result in more optimized chip performance and lower per-unit cost than PLDs, it typically requires higher up-front costs and longer manufacturing lead times.

Historically, due to their lower per-unit costs, standard cells and gate arrays have been viewed as more cost effective than PLDs for large-volume, low-cost applications such as consumer electronics. Consequently, the unit volume of a PLD design is typically lower than that for a standard cell or gate array design. Additionally, some customers may choose to prototype with PLDs for initial engineering development and then re-design to a standard cell in volume production for lower per-unit cost. While such re-designs have always been an aspect of the PLD business, we believe that the following factors are driving electronic systems manufacturers to use PLDs for their systems’ entire life cycle: (1) the continual reduction in the price premium of programmable logic; (2) the ever-shortening product life cycle of many electronic systems; and (3) the use of more advanced chip manufacturing technology, which elevates the non-recurring engineering cost and risk of standard cells.

We believe that the adoption of more advanced chip manufacturing technology, which is increasing the total cost of chip development, is reducing the cost advantage of standard cells and gate arrays. The cost and time for us to develop a PLD is comparable to the cost and time for others to develop a gate array or standard cell. Since each of our PLDs is sold to hundreds or thousands of customers, we spread development costs across our wide customer base. In contrast, gate array and standard cell suppliers build fixed, custom chips for a single customer for use in a single application, thus imposing a high up-front cost on the customer. These costs increase as chip manufacturing technology advances and becomes more complex. Consequently, we believe that this factor is driving more applications toward the use of PLDs rather than standard cells and gate arrays despite the higher per-unit cost of PLDs.

We believe that competitive pressures to improve chip functionality, performance, reliability, and cost are driving customers increasingly towards system-on-a-programmable-chip, or SOPC, solutions. We define a SOPC solution to be a high-density PLD containing three or more of the following: (1) logic, (2) memory, (3) high-speed input/output, or I/O, and (4) a processor. With SOPC solutions, system designers require less, if any, separate microprocessor or memory chips, thereby allowing them to reduce the size and cost of their systems. User programmability satisfies the need for custom circuitry and rapid changes, thereby enhancing time to market.

In order to capture a larger percentage of our customer’s bill of materials for semiconductors, we are focused on providing the most advanced SOPC solutions. To accomplish this goal, we strive to offer our customers:


	•	PLDs with the speed, density, functionality, and package types to meet their specific needs;


	•	HardCopy^TM devices that enable our customers to move from a PLD to a low-cost, custom implementation of their designs;

	•	Optimized, pre-verified system-level IP cores to speed their design process;

	•	State-of-the-art development tools that offer low cost and ease of use and compatibility with other industry-standard electronic design automation, or EDA, tools; and

	•	A complete customer support system.

We experience significant direct competition from other companies that are in the programmable logic sub-segment, including Xilinx, Inc. and Lattice Semiconductor Corporation. We expect that as the dollar volume of the programmable logic sub-segment grows, the attractiveness of this sub-segment to larger competitors will continue to increase.


	•	The capability of software development tools and IP cores;

	•	Device performance and features;

	•	Quality and reliability;

	•	Pricing and availability;

	•	Technical service and customer support; and

	•	Technical innovation.

We believe that we compete favorably with respect to these factors and that our proprietary device architecture and our installed base of software development systems may provide some competitive advantage. We have been able to introduce new product families that, as compared to their predecessors, provide greater functionality at a lower price for any given density because of unique architectural innovation and advanced technologies.

We also believe that in certain circumstances these new product families compete favorably against ASICs as well as against other types of chips such as microcontrollers, microprocessors, and DSPs. The functionality offered by these other types of chips can be implemented in PLDs using pre-built and pre-verified IP cores. An IP core is typically offered in either a “hard” or “soft” form. A hard IP core is embedded into the silicon of our chips. A soft IP core is a design file that our customers can license for integration into their overall PLD design. By incorporating more functionality and logic capacity on a programmable fabric while providing the necessary design tools and IP cores to design a reliable system, we believe we can build upon the advantages of PLDs over competing solutions.

As is true of the semiconductor industry as a whole, the ASIC segment and the PLD sub-segment are intensely competitive and are characterized by rapid technological change, rapid rates of product obsolescence, and price erosion. All of these factors may influence our future operating results. For a discussion of risk factors associated with our strategy and competition, see Item 7—Risk Factors—“Our financial results depend on our ability to compete successfully in the highly competitive semiconductor industry” and “Our future success depends on our ability to define, develop, and sell new products that achieve market acceptance.”

Our products consist primarily of devices, IP cores, and proprietary development tools. Altogether, these products form a comprehensive solution for the implementation of SOPC applications. A brief overview of these products follows.

Our devices fall into the following four categories: (1) FPGAs, (2) CPLDs, (3) low-cost, masked devices, and (4) configuration devices, which store the programming code for our FPGAs. These devices span multiple architectures and device families, with a total of more than 1,000 product options. Each device family offers unique functional benefits and differing density and performance specifications for implementing particular applications.

Our general-purpose FPGA products, consisting of our Stratix^TM, Cyclone^TM, APEX^TM II, APEX, FLEX®, and ACEX® product families, are built using the most advanced CMOS static random access memory, or SRAM, process technology and address a broad range of applications in telecommunications, data communications, computing and storage, consumer, and industrial markets. The basic logic building block in a general-purpose FPGA is the logic element. With more logic elements, an FPGA can support more logic circuitry. In addition to the number of logic elements, the amount of embedded RAM within general-purpose FPGAs is also important in user device selection. Our general-purpose FPGAs currently provide up to 79,040 logic elements and up to 7 megabits of RAM in a single device, while offering competitive logic core and I/O performance levels.

STRATIX: The Stratix architecture was publicly announced in February 2002 and shipments commenced in May 2002. Based on a 1.5-V, 0.13-micron process, the Stratix device family (1) provides a high-bandwidth architecture that enables block-based design methodology for enhanced time to market, (2) is presently available in densities ranging from 10,570 to 79,040 logic elements, (3) includes up to 7 megabits of embedded RAM, and (4) contains all-layer-copper interconnect technology, which results in greater performance compared to traditional aluminum/ tungsten interconnect. Our Stratix devices are also the first FPGAs to contain embedded DSP capability and various sizes of embedded memory blocks. Embedded DSP blocks provide fast performance for applications such as encryption and filtering in wireless communications, image processing in digital entertainment, and quality of service algorithms in data communications. Stratix devices support a wide array of high-speed, standard interfaces allowing Stratix devices to be suitable for applications including high-bandwidth routers and switches, semiconductor testers, medical imaging, and advanced data storage systems.

CYCLONE: The Cyclone architecture was announced in September 2002 and devices began shipping in December 2002. Cyclone devices are built on a cost-optimized, all-copper 1.5-V, 0.13-micron process, and offer powerful functionality at a low cost. With up to 20,060 logic elements and 288 kilobits of RAM, Cyclone devices can integrate many complex functions. The combination of a low-cost structure with abundant device resources makes Cyclone devices ideal for high-volume applications in areas such as digital set-top boxes, DVD player/ recorder systems, automotive telematics, and plasma displays.

APEX II: Utilizing a second-generation APEX architecture, the APEX II device family is designed to address the increasing performance and bandwidth requirements of a wide range of applications. These devices are built on 1.8-V, 0.13-micron and 0.15-micron processes and include all-layer-copper interconnect technology. They range in density from 16,640 to 67,200 logic elements and include over 1.0 megabit of embedded RAM.

APEX 20K, APEX 20KE, and APEX 20KC: Based on the APEX architecture, the 2.5-V APEX 20K, 1.8-V APEX 20KE, and 1.8-V APEX 20KC device families provide design flexibility and efficiency for high-performance SOPC applications. The APEX 20KC family utilizes copper for all layers of metal interconnect. Devices in these families (1) range in density from 1,200 to 51,840 logic elements, (2) include up to 432 kilobits of embedded RAM, and (3) utilize an embedded system block, or ESB, to embed content addressable memory, or CAM, used in packet switching. Additionally, these devices contain enhanced phase-locked loops, or PLLs, for high-speed clock management, and LVDS.

FLEX 10K, FLEX 10KA, and FLEX 10KE: Based on the FLEX 10K architecture, which was the first PLD architecture to provide on-chip embedded memory, the 5.0-V FLEX 10K, 3.3-V FLEX 10KA, and 2.5-V FLEX 10KE device families offer embedded array blocks, or EABs, to provide a combination of logic and embedded RAM on a single-chip architecture for high-speed, high-bandwidth applications. These families range in density from 576 to 12,160 logic elements and include up to 96 kilobits of embedded RAM.

ACEX 1K: Our ACEX 1K device family, which combines logic elements and EABs, offers complete system-level integration on a single device for cost-sensitive, volume-driven applications such as cable modems, xDSL modems, low-cost switches, and routers. Devices in this family range in density from 576 to 4,992 logic elements, include up to 48 kilobits of embedded RAM, and operate at a 2.5-V supply voltage.

As a complement to our general-purpose FPGAs, our embedded IP-based FPGAs combine a general-purpose FPGA architecture with embedded IP cores. Together, these two elements comprise a fully integrated and flexible, customizable solution for use in targeted applications. Our embedded IP-based FPGAs consist of our Excalibur^TM devices, which are well-suited for applications requiring high-performance embedded microprocessors, and our Stratix GX and Mercury^TM devices, which are best employed in applications that need embedded transceiver capability for ultra high-speed data transfer.

EXCALIBUR EMBEDDED PROCESSOR SOLUTIONS: Our Excalibur solutions combine logic, memory, and an embedded processor core, which together allow engineers to integrate an entire system on a single PLD for a wide range of applications, from 3G base stations, embedded routers, microcontrollers, and network processors to industrial control and factory automation. The Excalibur solutions consist of two embedded processor architectures: (1) our Nios® soft core embedded processor solution and (2) the ARM®-based embedded processor solution. The Nios soft core utilizes a reduced instruction set computing, or RISC, architecture and is a cost-competitive and flexible alternative to discrete microcontroller solutions. The Nios soft core can be efficiently implemented in all of our general-purpose FPGA devices as well as in our IP-based FPGA products. The ARM-based embedded processor PLD family uses technology licensed from ARM Limited and consists of multiple devices that each contains an ARM-based RISC processor core. These ARM-based Excalibur devices provide our customers with enhanced integration and royalty-free technology access for applications requiring the capability and complexity of an ARM processor while also needing the flexibility and customization of a general-purpose FPGA.

STRATIX GX: The Stratix GX device family combines 3.125 Gbps per channel transceiver technology with our Stratix FPGA architecture. Announced in November 2002 with initial shipments to customers in January 2003, Stratix GX devices are built on a 1.5-V, 0.13-micron, all-layer-copper SRAM process and contain up to 20 transceiver channels, offering system architects in the broad marketplace—anywhere from communications to high-end consumer electronics to mass storage systems—a low-risk path to 3.125 Gbps transceiver capability. Stratix GX devices are ideal for implementing common interface protocols including proprietary systems that require data rates up to 3.125 Gbps, while providing lower power per channel than competing solutions. Devices in this family range in density from 10,570 to 41,250 logic elements and contain up to 3 megabits of RAM.

MERCURY: Our first IP-based FPGAs aimed at high-speed serial-interface applications, Mercury devices address a wide range of serial backplane, chip-to-chip, and line-side applications. Providing speeds of up to 1.25 Gbps per channel, these devices integrate a high-speed clock data recovery-enabled transceiver with a performance-optimized programmable logic core. Devices in this family range in density from 4,800 to 14,400 logic elements and include up to 112 kilobits of embedded RAM.

Our CPLD products, consisting of our MAX® and Classic^TM product families, are built using CMOS floating-gate process technology and address a wide range of high-speed glue logic functions found in a broad range of electronics equipment in the telecommunications, data communications, computing and storage, consumer, and industrial markets. Glue logic is basic logic that enables the interaction of multiple subsystem components. The basic logic building block in a general-purpose CPLD is the macrocell. Therefore, the total number of macrocells within CPLDs is often used to gauge relative logic density. Another critical metric used in gauging CPLD performance is the total propagation delay, or t_PD, from an input pin to an output pin. Our MAX CPLDs provide over 500 macrocells in a single device with t_PD specifications as fast as 3.5 nanoseconds.

MAX 7000, MAX 7000S, MAX 7000A, and MAX 7000B: The 5.0-V MAX 7000, 5.0-V MAX 7000S, 3.3-V MAX 7000A, and 2.5-V MAX 7000B device families are among the most widely used programmable logic families in the industry. These device families provide high-density, high-speed, I/O-intensive programmable logic solutions for a broad range of glue logic applications, including state machines, control functions, and address decoding. Devices in these families range in density from 32 to 512 macrocells and provide t_PD values as fast as 3.5 nanoseconds.

MAX 3000A: The 3.3-V MAX 3000A low cost devices, which range in density from 32 to 512 macrocells, target high-volume, low-cost glue logic applications.

The per-unit price of high-density FPGAs traditionally makes them suitable only as a development and prototyping tool for our customers. Our HardCopy family, described below, offers customers with a conversion path from a high-density FPGA to a non-FPGA production device.

HARDCOPY: For our highest-density FPGA products, our HardCopy devices combine proprietary silicon design and an automated process to offer our customers a seamless migration path to a mask-programmed implementation of their designs for low-cost and high-volume applications. As a result, HardCopy devices extend the flexibility, power, and time-to-market advantages of high-density FPGAs to high-volume, more cost-sensitive applications traditionally covered by standard cells and gate arrays. HardCopy devices offer up to a 70% die size reduction, resulting in a lower cost for customers seeking a high-volume production solution in our highest density FPGAs.

IP cores are pre-verified building blocks for implementing standard system-level functions within a PLD design. Soft IP cores available for use in our devices consist of MegaCore® functions, which we license to our customers, and Altera Megafunction Partners Program, or AMPP^SM, cores, which are licensed to our customers by third parties. With IP cores, system designers can focus more time and energy on improving and differentiating the unique aspects of their system design, rather than spending time designing common off-the-shelf functions from the ground up. As a result, IP cores are essential to providing our customers SOPC solutions that enable higher levels of integration and faster time to market. Today, we offer a broad range of soft IP cores for various system blocks for DSP algorithms, bus interfaces, memory controllers, telecommunications, data communications, microprocessors, and peripherals. Prior to licensing a soft IP core, customers may download an encrypted soft IP core from our web site and verify that it works in their own system design. While licensing soft IP cores represents a small portion of our total revenues, we believe our investment in this area enhances our competitive position relative to other ASIC suppliers as well as PLD suppliers.

Our proprietary development tools, consisting primarily of the Quartus® II and MAX+PLUS® II software, enable our customers to successfully complete all necessary PLD design steps. Our tools enhance engineering productivity by facilitating design entry, design compilation, design verification, and device programming during the initial design and subsequent design revisions.

Our development tools can be used on a variety of computer platforms and have built-in interfaces with other engineering design software, thus making it possible for customers to utilize their existing design environment. Our Quartus II and MAX+PLUS II software development tools run under the Microsoft Windows and UNIX (including Solaris, HP-UX, and Linux) operating environments. Our development tools also provide interfaces to many industry-standard EDA tools, including those offered by Mentor Graphics Corporation, Synplicity, Inc., and Synopsys, Inc.

Like soft IP cores, our licensing of development tools represents a small portion of our total revenues, but provides a critical and necessary element of our market strategy, and can drive our success in competing for design wins against other ASIC suppliers as well as PLD suppliers.

Our research and development activities have focused primarily on PLDs and on the associated development software and hardware. We have developed these related products in parallel to provide software support to customers upon device introduction. As a result of our research and development efforts, we have introduced during the past three years a number of new families, such as the Stratix, Stratix GX, Cyclone, APEX II, and HardCopy device families, the Excalibur embedded processor solutions, and the Quartus II development platform. We have also redesigned a number of our products to accommodate new wafer fabrication processes.

Our research and development expenditures were $182.8 million in 2002, $170.9 million in 2001, and $178.7 million in 2000. Excluding a $6.3 million one-time charge for acquired in-process research and development, our research and development expenditures in 2000 were $172.4 million. We have not capitalized research and development or software costs to date. We intend to continue to spend substantial amounts on research and development in order to continue to develop new products and achieve market acceptance for such products, particularly in light of the industry pattern of short product life cycles and increasing competition within the CMOS logic market.

We generally rely on intellectual property law, including patent, copyright, trademark, and trade secret laws, to establish and maintain our proprietary rights in products and technology. As of December 31, 2002, we held a total of 587 issued United States patents and 140 patents issued in other countries relating to various aspects of our products and technology; we also have a number of patent applications currently pending. Also, we have used, registered, and applied to register certain trademarks and service marks to distinguish our products, technologies, and services from those of our competitors in the United States and foreign countries. In addition, we file registrations in the United States under the Semiconductor Chip Protection Act to protect our chip designs. Finally, we have entered into technology licensing agreements that give us rights to design, manufacture, and package products using certain intellectual property owned by others. In July 2001, we entered into a settlement agreement with Xilinx under which we settled all pending litigation with Xilinx. As part of the settlement agreement, we entered into a royalty-free patent cross license agreement with Xilinx, including a prohibition of further patent litigation between the two companies through July 2006. In connection with the settlement agreement, we paid Xilinx a one-time payment of $20 million. Similarly, in July 2001 we entered into a settlement agreement with Lattice under which we settled all pending patent litigation with Lattice. As part of the settlement agreement, we entered into a royalty-free patent cross license agreement with Lattice, including a multi-year prohibition of further patent litigation between the two companies. No payments were made by Altera or Lattice as part of the settlement.

When necessary, we seek to enforce our intellectual property rights. Although we believe that protection afforded by our intellectual property rights has value, the rapidly changing technology in the semiconductor industry makes our future success dependent primarily on the innovative skills, technological expertise, and management abilities of our employees rather than on our patent, trademark, or other proprietary rights. For a discussion of risk factors associated with our patents, trademarks, and licenses, see Item 3, Item 7—Risk Factors—“Our intellectual property rights may not provide meaningful protection from our competitors” and “We may face significant costs arising from intellectual property litigation,” and Note 13 to our consolidated financial statements.

We market our products worldwide through a network of distributors and direct sales personnel. In the United States and Canada, we also rely on a network of independent sales representatives. From time to time, we may add or remove independent sales representatives or distributors from our selling organization as we deem appropriate to the level of business.

Throughout the United States, we have domestic sales offices in major metropolitan areas. Our direct sales personnel and independent sales representatives focus on strategic and key accounts. Distributors generally focus selling activities on the broad base of small- and medium-size customers and provide warehousing and logistics services to all of our customers. Our primary distributor in the United States is Arrow Electronics, Inc., which is responsible for creating customer demand from its customer base, providing technical support and other value-added services, filling customers’ orders, and stocking our products.

Our international business is supported by a network of distributors in major European countries, Japan, and various countries throughout Asia Pacific. In addition, we maintain international sales support offices in the metropolitan areas of Bangalore, Beijing, Helsinki, Hong Kong, London, Munich, Ottawa, Paris, Seoul, Shanghai, Stockholm, Stuttgart, Taipei, Tokyo, and Turin.

Through 2002, all international sales were denominated in U.S. dollars. For the year ended December 31, 2002, worldwide sales through distributors for subsequent resale to original equipment manufacturers, or OEMs, or their subcontract manufacturers accounted for over 95% of total sales. In 2002, 2001, and 2000, two distributors accounted for more than 10% of sales. Arrow was, and continues to be, our largest distributor. Arrow on a worldwide basis accounted for 53% of sales in

2002, 54% of sales in 2001, and 58% of sales in 2000. Altima Corporation accounted for 14% of sales in 2002, 13% of sales in 2001, and 11% of sales in 2000. No single end customer accounted for more than 10% of our sales in 2002, 2001, or 2000. International sales constituted 60% of sales in 2002, 55% of sales in 2001, and 43% of sales in 2000.

For a detailed description of our sales by geographic region, see Item 7 and Note 14 to our consolidated financial statements. For a discussion of the risk factors associated with our foreign operations, see Item 7—Risk Factors—“We depend on international sales for a majority of our total sales” and “Our business is subject to tax risks associated with being a multinational corporation.”

Our backlog consists of OEM orders and distributor orders that are each requested for delivery within the next three months. Our backlog of orders on December 31, 2002 was approximately $183.3 million compared to $119.6 million on December 31, 2001. The increase in backlog is attributable to an increase in sales, together with an increase in advance orders made by our distributors and OEMs.

Historically, backlog has been a poor predictor of future customer demand. While our backlog can increase during periods of high demand and supply constraints, our orders are generally cancelable without significant penalty at the option of the purchaser. Further, we defer recognition of revenue on shipments to distributors until the product is resold. For all of these reasons, backlog as of any particular date should not be used as a reliable predictor of sales for any future period.

Customer support and service are important aspects of selling and marketing our products. We provide several levels of technical user support, including applications assistance, design services, and customer training. Also, our applications engineering staff publishes data sheets and application notes, conducts technical seminars, and provides design assistance via the Internet and electronic links to the customer. Finally, as a service to our customers, inventory is maintained by us and our distributors to meet their short-term delivery needs for our products.

We do not directly manufacture our silicon wafers. Instead, our silicon wafers are produced using various semiconductor foundries. This enables us to take advantage of these suppliers’ high-volume economies of scale and also gives us direct and more timely access to advancing process technology. We purchase nearly all of our silicon wafers from Taiwan Semiconductor Manufacturing Company, or TSMC, and the remaining portion from Sharp Corporation. In the past, we have used other foundry vendors, and we may establish additional foundry relationships as such arrangements become economically useful or technically necessary. For a discussion of risk factors associated with our wafer supply arrangements, see Item 7—Risk Factors—“We depend entirely on independent subcontractors to supply us with finished silicon wafers” and “Conditions outside the control of our independent subcontractors may impact their business operations.”

After wafer manufacturing is completed, each wafer is tested using a variety of test and handling equipment. Such wafer testing is accomplished at TSMC, Sharp, and our San Jose pilot line facility, which is used primarily for new product development. This testing is performed on equipment owned by us and consigned to our vendors.

Resulting wafers are then shipped to various assembly suppliers in Asia, where good die are separated into individual chips that are then encapsulated in packages. We employ a number of independent suppliers for assembly purposes. This enables us to take advantage of these subcontractors’ high-volume economies of scale, supply flexibility, and gives us direct and more timely access to advancing packaging technology. We purchase almost all of our assembly services from Amkor Electronics, Inc. in Korea and the Philippines, ASAT Limited in Hong Kong, Advanced Semiconductor Engineering, Inc., or ASE, in Malaysia and Taiwan, and Fujitsu Microelectronics, Inc. in Japan.

Following assembly, each of the packaged units receives final testing, marking, and inspection prior to shipment to customers. We obtain almost all of our final test and back-end operation services from Amkor, ASAT, and ASE. Final

testing by these assembly suppliers is accomplished through the use of our proprietary test software and hardware, which is consigned to or owned by such suppliers and/or third-party commercial testers. On our behalf, these suppliers also warehouse and ship our products to our OEMs and distributors.

For a discussion of risk factors associated with our testing and assembly arrangements, see Item 7—Risk Factors—“We depend on independent subcontractors, located primarily in Asia, to assembly and test our semiconductor products” and “Conditions outside the control of our independent subcontractors may impact their business operations.”

There are no family relationships among our executive officers or between any executive officer and any of our directors.

John P. Daane has served as our President and Chief Executive Officer since November 2000 and as one of our directors since December 2000. Prior to joining us, Mr. Daane spent 15 years at LSI Logic Corporation, a semiconductor manufacturer, most recently as Executive Vice President, Communications Products Group, with responsibility for ASIC technology development and the Computer, Consumer, and Communications divisions. Mr. Daane earned his bachelors degree from the University of California, Berkeley in 1986.

Denis M. Berlan joined us in December 1989 as Vice President, Product Engineering and was named Vice President, Operations and Product Engineering in October 1994. In January 1996, he was named Vice President, Operations. In January 1997, he was named Executive Vice President and Chief Operating Officer. He was previously employed by Advanced Micro Devices, Inc., or AMD, a semiconductor manufacturer, and by Lattice Semiconductor Corporation, a semiconductor manufacturer, in engineering management capacities. Mr. Berlan received his M.S.E.E. in 1972 and Ph.D. in 1977 from the University of Grenoble in France and an M.B.A. in 1987 from the University of Santa Clara.

Erik R. Cleage joined us as International Marketing Manager in February 1986. He became Director, Japan and Asia Pacific Sales in April 1989, was appointed Vice President, Marketing in August 1990 and Senior Vice President, Marketing in January 1999. Previously, he was employed by AMD and Fairchild Semiconductor Corporation, a semiconductor manufacturer, in various positions. Mr. Cleage earned his bachelors degree from Stanford University in 1981.

John R. Fitzhenry joined us in May 1995 as Vice President, Human Resources. From February 1983 to May 1995, he was employed by Apple Computer, Inc., a manufacturer of personal computers, in various human resource management positions. Mr. Fitzhenry earned his bachelors degree from the University of California, Santa Barbara in 1971 and his J.D. from the University of the Pacific, McGeorge School of Law in 1976.

Lance M. Lissner joined us in May 1998 as Vice President of Business Development and Investor Relations and was appointed Senior Vice President, Business Development in November 2000. Prior to that time, Mr. Lissner was a corporate officer of Measurex Corporation, a developer of computer-integrated measurement, control, and information systems, where he was employed since 1973 and held various positions in sales, marketing, engineering, and business development. Mr. Lissner earned his bachelors degree from Harvey Mudd College in 1972 and his masters degree from Stanford University in 1973.

George A. Papa joined us in February 2002 as Senior Vice President, Worldwide Sales. From February 2000 to February 2002, Mr. Papa served as Vice President of Worldwide Sales of the Communications Business Group of Marvell Semiconductor, Inc., a semiconductor company. From March 1997 to February 2000, he served as Vice President of Worldwide Sales for Level One Communications, Inc., a subsidiary of Intel Corporation, a semiconductor company. From February 1991 to March 1997, Mr. Papa served as Vice President of North American Sales for Siemens Corporation, a diversified global technology company. Mr. Papa earned his bachelors degree from Northeastern University in 1971.

Jordan S. Plofsky joined us in February 2001 as Senior Vice President, Vertical Markets and Embedded Processor Products and became Senior Vice President, Applications Business Groups in March 2002. Prior to joining us, Mr. Plofsky was employed by LSI Logic from October 1996 to February 2001, most recently as Executive Vice President, Enterprise Infrastructure Group from November 2000 to February 2001 and Vice President and General Manager, Networking Products Division from June 1998 to November 2000. Mr. Plofsky earned a bachelors degree from the University of Illinois, Urbana-Champaign in 1982.

Nathan M. Sarkisian joined us in June 1992 as Corporate Controller. He was appointed Vice President, Finance and Chief Financial Officer in August 1995 and Senior Vice President and Chief Financial Officer in March 1998. Prior to joining us, Mr. Sarkisian held various accounting and financial positions at Fairchild and at Schlumberger Limited, an oil field services company. Mr. Sarkisian earned a bachelors degree from Stanford University in 1981 and an M.B.A. from Harvard University in 1992.

Katherine E. Schuelke joined us in March 1996 as Corporate Attorney. She became Senior Corporate Attorney in July 1997 and Assistant General Counsel and Assistant Secretary in July 1999. In October 2001, she was appointed Vice President, General Counsel and Secretary. Prior to March 1996, Ms. Schuelke was an attorney at the law firm of Morrison & Foerster LLP for seven years. Ms. Schuelke earned a bachelors degree from the State University of New York at Buffalo in 1986 and a J.D. from New York University in 1989.

As of December 31, 2002, we had 1,882 regular employees. Of these employees, 1,218 were located in the United States, and 664 were employed in 17 other countries. None of our employees is represented by a labor union. We have not experienced any work stoppages, and we believe that our employee relations are good.

Our annual report on Form 10-K, quarterly reports on Form 10-Q, current reports on Form 8-K, and amendments to reports filed pursuant to Sections 13(a) and 15(d) of the Securities Exchange Act of 1934, as amended, are available free of charge on our website at www.altera.com, when such reports are available on the Securities and Exchange Commission website.

Our headquarters facility is located in San Jose, California on approximately 25 acres of land, which we purchased in June 1995. The campus for the headquarters facility currently consists of four interconnected buildings totaling approximately 500,000 square feet. Design, research, marketing, administrative, and limited manufacturing activities are performed in this facility. We also have a 240,000 square foot design and test engineering facility in Penang, Malaysia. This facility is situated on land leased on a long-term basis from the Penang Development Corporation. Finally, we lease on a short-term basis office facilities for our domestic and international sales management offices, our European Technology Center in the United Kingdom, our Toronto Technology Center, and our Ottawa Technology Center. Rental expense under all operating leases amounted to $6.3 million in 2002. We believe that our existing facilities and planned future expansions are adequate for our current and foreseeable future needs.

We are a party to lawsuits and have in the past and may in the future become a party to lawsuits involving various types of claims, including, but not limited to, unfair competition and intellectual property matters. Legal proceedings tend to be unpredictable and costly and may be affected by events outside of our control. We cannot assure you that litigation will not have an adverse effect on our financial position or results of operations.

In November 1999, we sued Clear Logic Inc. in the United States District Court for the Northern District of California, San Jose Division, alleging that Clear Logic is unlawfully appropriating our registered mask work technology in violation of the federal mask work statute and that Clear Logic has unlawfully interfered with our relationships and contracts with our customers. The lawsuit seeks compensatory and punitive damages and an injunction to stop Clear Logic from unlawfully using our mask work technology and from interfering with our customers. Clear Logic answered the complaint by denying that it is infringing our mask work technology and denying that it has unlawfully interfered with our relationships and contracts with our customers. Clear Logic also filed a counterclaim against us for unfair competition under California law alleging that we have made false statements to our customers regarding Clear Logic.

In October 2001, the District Court ruled on summary judgment motions filed by both parties. The Court denied Clear Logic’s motion for summary judgment of our claim of tortious interference with our software license, ruling that “using the bitstream [from our MAX+PLUS II software] to program a Clear Logic device violates Altera’s software license.” Further, the Court granted our motion for summary judgment disposing of Clear Logic’s counterclaim of unfair competition. On January 4, 2002, Clear Logic filed a petition for Chapter 11 bankruptcy, which resulted in all proceedings in the lawsuit being automatically stayed. We moved to have this stay lifted, and the bankruptcy court granted our motion effective May 31, 2002. On July 9, 2002, the Court issued a preliminary injunction enjoining Clear Logic and its distributors from selling “any semiconductor device that was made, designed, configured, programmed or otherwise manufactured through or with the aid of any bitstream file or other output generated by” our MAX+PLUS II software. On November 25, 2002, a jury rendered a verdict in our favor on all issues in the lawsuit.

Due to the nature of the litigation with Clear Logic, our management cannot estimate the total expenses that we will incur prosecuting the lawsuit. Although we cannot make any assurances as to the results of this case, we intend to pursue our claims vigorously.

Item 5. Market for Registrant’s Common Equity and Related Stockholder Matters.

Our common stock trades on the Nasdaq National Market under the symbol “ALTR.” As of February 18, 2003, there were approximately 706 stockholders of record. However, the majority of our shares are held by brokers and other institutions on behalf of approximately 76,774 stockholders as of February 18, 2003.

The closing price of our common stock on February 18, 2003 was $12.51 per share as reported by the Nasdaq National Market. The following table sets forth, for the periods indicated, the high and low closing sale prices for our common stock as reported by the Nasdaq National Market:

Our policy has been to reinvest earnings to fund future growth and to repurchase shares of our common stock. Accordingly, we have not paid any cash dividends on our common stock and do not anticipate paying cash dividends in the foreseeable future.

The section entitled “Selected Consolidated Financial Data” in our 2002 Annual Report is incorporated herein by reference.

Item 7. Management’s Discussion and Analysis of Financial Condition and Results of Operations.

The following Management’s Discussion and Analysis of Financial Condition and Results of Operations, as well as information contained in “Risk Factors” below and elsewhere in this report, contains forward-looking statements, which are provided under the “safe harbor” protection of the Private Securities Litigation Reform Act of 1995. Forward-looking statements are generally written in the future tense and/or are preceded by words such as “will,” “may,” “should,” “could,” “expect,” “suggest,” “believe,” “anticipate,” “intend,” “plan,” or other similar words. Forward-looking statements include statements regarding (1) our gross margins and factors that affect gross margins, such as the costs of raw materials, our ability to absorb manufacturing costs, trends in selling prices, and the sale of previously reserved inventory; (2) our research and development efforts; (3) the commercial success of our new products; (4) trends in future sales; (5) the availability of cash to finance operations; (6) our ability to hold our fixed income investments until maturity; and (7) future economic conditions.

We design, manufacture, and market high-performance, high-density programmable logic devices, or PLDs, pre-defined design building blocks known as intellectual property, or IP, cores, and associated development tools. Our PLDs, which consist of field-programmable gate arrays, or FPGAs, and complex programmable logic devices, or CPLDs, are semiconductor integrated circuits that are manufactured as standard chips that our customers program to perform desired logic functions within their electronic systems. Our customers can license IP cores from us for implementation of standard functions in their PLD designs. Customers can also develop, compile, verify, and program their PLD designs using our proprietary development software, which operates on personal computers and engineering workstations. FPGAs, which represented 61% of our sales in 2002, consist of our Stratix, Cyclone, APEX, APEX II, FLEX, ACEX, Excalibur, and Mercury families; and CPLDs, which represented 31% of our total sales in 2002, consist of our MAX and Classic families. The balance of our sales consists of masked devices, software tools, IP cores, and support products. Our products serve a wide range of markets, including telecommunications, data communications, computing and storage, consumer, and industrial applications.

We classify our products into three categories: New, Mainstream, and Mature and Other Products.


	•	New Products include ACEX 1K, APEX 20KC, APEX 20KE, APEX II, MAX 7000B, Cyclone, Excalibur, HardCopy, Mercury, and Stratix families;

	•	Mainstream Products include APEX 20K, FLEX 6000, FLEX 10KA, FLEX 10KE, MAX 3000A, and MAX 7000A families; and

	•	Mature and Other Products include Classic, FLEX 8000, FLEX 10K, MAX 7000, MAX 7000S, and MAX 9000 families, MPLD, configuration and other devices, tools, and intellectual property.

The preparation of our financial statements and related disclosures in conformity with accounting principles generally accepted in the United States requires our management to make judgments and estimates that affect the amounts reported in our financial statements and accompanying notes. Our management believes that we consistently apply judgments and

estimates and such consistent application results in financial statements and accompanying notes that fairly represent all periods presented. However, any errors in these judgments and estimates may have a material impact on our statement of operations and financial conditions. Critical accounting policies, as defined by the Securities and Exchange Commission, are those that are most important to the portrayal of our financial condition and results of operations and require our management’s most difficult and subjective judgments and estimates of matters that are inherently uncertain. Our critical accounting policies include those regarding (1) revenue recognition; (2) the valuation of inventories; and (3) the valuation of property, equipment, and intangible assets.

REVENUE RECOGNITION . We sell our products to original equipment manufacturers, or OEMs, and to electronic components distributors who resell products to OEMs or their subcontract manufacturers. We recognize revenue on products sold to OEMs upon shipment, but defer recognition of revenue on products sold to distributors until the products are resold. More than ninety-five percent of our products are sold to distributors for subsequent resale to OEMs or their subcontract manufacturers. Our revenue reporting is highly dependent on receiving pertinent and accurate data from our distributors in a timely fashion. Distributors provide us periodic data regarding the product, price, quantity, and end customer on their shipments as well as the quantities of our products they still have in stock. Using this reported information, we apply judgment in reconciling changes in distributors’ inventories of our products to their reported activities. We have developed robust systems for receiving that information and have additionally developed cross-checks for verifying the accuracy of the reported information. In addition, we perform audits of our distributors’ information systems and inventories. We believe that the information supplied to us by our distributors is materially accurate and complete. If distributors incorrectly report their sales or mis-state their inventory of our products, it could lead to inaccurate reporting of our revenues and income.

VALUATION OF INVENTORIES . Inventories are recorded at the lower of cost on a first-in-first-out basis (approximated by standard cost) or market. We reserve inventory that is excess to projected customer demand, and the creation of such reserves results in a write-down of inventory to net realizable value and a charge to cost of goods sold. Historically, it has been difficult to forecast customer demand especially at the part-number level. Many of the orders we receive from our customers and distributors request delivery of product on relatively short notice and with lead times less than our manufacturing cycle time. In order to provide competitive delivery times to our customers, we build and stock a certain amount of inventory in anticipation of customer demand that may not materialize. Moreover, as is common in the semiconductor industry, we allow customers to cancel orders with minimal advance notice. Thus, even product built to satisfy specific customer orders may not ultimately be required to fulfill customer demand. We routinely compare our inventory against projected demand and as a result frequently record immaterial inventory charges to provision for excess and obsolete inventories. Nevertheless, at any point in time, some portion of our unreserved inventory is subject to the risk of being materially in excess to projected demand. In 2001, as a result of a large and unforecasted decline in sales, we determined that a significant portion of our inventory was excess to projected demand and recorded inventory charges of $154.5 million. While we endeavor to accurately predict demand and stock commensurate inventory levels, we may record unanticipated material inventory write-downs in the future.

VALUATION OF PROPERTY, EQUIPMENT AND INTANGIBLE ASSETS . We evaluate the recoverability of our property, equipment and intangible assets in accordance with Statement of Financial Accounting Standards No. 144, or SFAS No. 144, “Accounting for the Impairment or Disposal of Long-Lived Assets.” We regularly compare the carrying value of long-lived assets to our projection of future undiscounted cash flows attributable to such assets and in the event that the carrying value exceeds the future undiscounted cash flows, we record an impairment charge against income equal to the excess of the carrying value over the asset’s fair value. Actual useful lives and future cash flows could be different from those estimated by our management. These differences could have a material effect on our future operating results.

In 2001, we recorded a charge of $13.3 million for the impairment of (1) production and other equipment that was removed from service and subsequently sold, (2) purchased intangible assets related to technology acquired in previous acquisitions but no longer being used, and (3) investments in development stage enterprises that were in financial distress. These charges were classified as operating expenses in our consolidated statements of operations.

SALES : Sales were $711.7 million in 2002, $839.4 million in 2001, and $1,376.8 million in 2000. Sales declined 15% in 2002 from 2001 and 39% in 2001 from 2000.

The decline in sales in 2001 was the result of five consecutive sequential declines in quarterly sales beginning in the fourth quarter of 2000 and ending in the fourth quarter of 2001. The protracted deceleration resulted in a peak-to-trough decline in quarterly sales of nearly 60%. This period of decline was the result of a general economic downturn and softening demand for products manufactured by our customers, especially those in the communications and computing equipment markets. Our customers, in response to reduced demand for their products, acted to reduce their inventories resulting in an inventory contraction throughout the entire supply chain. The reduction in end-market demand coupled with the inventory contraction resulted in significant sales declines for the semiconductor industry including the programmable logic segment.

As the rate of decline in our customers’ markets moderated and as customers achieved reduced inventories consistent with their reduced sales levels, they began to procure more semiconductors, including our products. This increase in demand, coupled with increasing sales of our New Products, led to sequential quarterly sales increases during 2002. Sales in total decreased 15% in 2002 compared to 2001 primarily due to lower unit sales of our Mature and Mainstream products as well as lower average unit selling prices in all product categories.

Sales by product category, as a percentage of total sales, were as follows for 2002, 2001, and 2000:

New Products represented 27% of total sales in 2002, up from 13% of total sales in 2001. Our New Products have been developed and introduced to the marketplace over the last several years. These products have additional features and higher densities than their predecessors. As a result of increased customer demand for PLDs, with higher densities and enhanced performance, we have experienced a shift in sales to our newer products from our more mature products. Sales of New Products increased 75% in 2002 compared to 2001, and 113% in 2001 compared to 2000. We expect that sales of our New Products will continue to increase in 2003 as design win momentum in our New Products continues to be strong.

Sales of Mainstream Products declined 28% in 2002 compared to 2001 and 42% in 2001 compared to 2000. Sales of Mature and Other Products declined 30% in 2002 compared to 2001 and 48% in 2001 compared to 2000. The declines in both product categories for 2002 and 2001 were driven by continued softness in end-markets, discontinuation of certain product lines by some customers, excess inventory at various customers, as well as price declines.

The semiconductor industry is intensely competitive and our products are subject to price erosion. New products generally have higher selling prices that typically decline over a product’s life cycle. Our strategy is to offset the overall reduction in sales that results from declining selling prices by introducing new products. This strategy is dependent on successful development and roll-out of new products and the market’s acceptance of those products. We believe that we have been generally successful in that regard, but can give no assurance of future success. Unless future new products are developed and introduced in a timely fashion and achieve market acceptance, future sales will decline.

Effective January 1, 2002, we adopted a new methodology for revenue classification by market segment. The market segment data is derived by analysis that involves interpretation and extrapolation and relies on information provided to us by our distributors and end customers; actual percentages may be different. Sales by market segment, as a percentage of total sales, were as follows for 2002. Comparable data for prior years is not available.

Sales in the Communications market segment declined 1% in the fourth quarter of 2002 compared to the same period a year ago. For the same periods, Industrial and Automotive increased 22%, Computer and Storage increased 13%, and Consumer increased 36%. The increase in the Industrial and Automotive market segment was primarily due to growth in medical business and manufacturing and test and measurement equipment. The increase in the Consumer market segment was primarily due to growth in the digital broadcast business.

Despite the unfavorable economic conditions and reduced capital spending for communications equipment, we continued to generate the largest percentage of our sales from the Communications market segment. The Communications market segment includes the networking, telecommunications, and wireless sectors. We believe that the Communications market segment will continue to be our largest market segment for the foreseeable future.

Sales by geography, as a percentage of total sales, were as follows for 2002, 2001, and 2000:

North America sales represented 40% of total sales in 2002 compared to 45% in 2001 and 57% in 2000. In large part, the percentage of sales for North America declined as certain end customers shifted their production from North America to subcontract manufacturing sites located in Asia Pacific. We expect that sales will continue to transfer from North America, Europe, and Japan to Asia Pacific for the foreseeable future. In absolute dollars, North America sales declined 25% in 2002 from 2001, while sales in Europe declined 22%, and Japan declined 8%. The declines in sales were primarily due to a general economic downturn and softening end-market demand especially in the Communications and Computer and Storage sectors.

In 2001, North America sales declined 52% from 2000, while sales in Europe declined 28%, Japan declined 20%, and Asia Pacific declined 6%. The decreases in sales in all geographical locations were primarily a result of unfavorable economic conditions that began to affect us in November 2000.

Major items in the statements of operations, expressed as a percentage of sales, were as follows:

GROSS MARGIN : Gross margins were 63% in 2002, 45% in 2001, and 66% in 2000. Gross margin in 2002 included a benefit of $18.0 million resulting from the sale of inventory previously written down in 2001. Excluding this inventory related benefit, gross margin was 61% in 2002.

Gross margin in 2001 included a $154.5 million write-down of inventories, which was charged against cost of sales. Excluding this inventory write-down, gross margin was 64% in 2001. The write-down reflected our evaluation that much of our inventory was in excess of projected demand. Through the first three quarters of 2000, we experienced rapid growth in demand for our products. Because we believed that strong demand would continue and because we desired to reduce lead times and improve customer service levels, we ordered significant volumes of wafers for delivery in the fourth quarter of 2000 and the first quarter of 2001. Demand began to fall precipitously in the fourth quarter of 2000, rendering many of the wafers that we had ordered in excess of projected demand. The products that we procure from our wafer suppliers are custom and unique to us. Once our suppliers begin production, we are obliged to take delivery of, and pay for, the material we have ordered. Our wafer suppliers’ manufacturing cycle times are often as long as three months and sometimes longer. This long manufacturing cycle time as contrasted to our customers’ desire for short delivery lead times necessitates that we order material based upon internal forecasts of demand. In the future, to the extent that we misestimate total demand, or the mix of demand, we may degrade customer service to unacceptably low levels or may procure materials that prove to be excess to projected demand, which may result in additional charges against cost of sales.

Excluding the 2002 inventory benefit and the 2001 inventory write-down, gross margins were 61% in 2002 and 64% in 2001. On this basis, the decrease in gross margins in 2002 compared to last year was due to declines in selling prices, coupled with fixed unit costs.

Excluding the favorable impact relating to the sale of inventory previously written down, we expect that gross margin will be in the range of 62% to 63% for 2003. This expectation is based on anticipated improvement in manufacturing overhead absorption as we increase production for certain products and on anticipated lower die costs resulting from improved yields and lower wafer prices, offset by declines in selling prices. Additionally, we anticipate that gross margins will benefit by approximately $30 million in 2003 from the sale of inventory previously written down. The actual amount of the benefit is dependent on the mix of products ordered by customers, is subject to significant volatility, and is difficult to reliably predict.

RESEARCH AND DEVELOPMENT EXPENSES : Research and development expenses were $182.8 million, or 26% of sales, in 2002 compared to $170.9 million, or 20% of sales, in 2001 and $178.7 million, or 13% of sales, in 2000. Research and development expenses include expenditures for labor, masks, prototype wafers, the amortization of deferred stock-based compensation for employees engaged in research and development activities, and expenses for the development of process technologies, new packages, and software to support new products and design environments.

Research and development expenses increased $11.9 million, or 7%, in 2002 compared to 2001. The increase was primarily attributable to higher spending on prototype wafers. Historically, the level of research and development expenses has fluctuated in part due to the timing of the purchase of masks and prototype wafers used in the development of new products. We expect that research and development expenses in 2003 will remain high relative to sales, and will be in the range of $175 million to $185 million as we continue the rapid rollout of Stratix, Stratix GX, and Cyclone families driving high mask, wafer, and prototype expenses.

In 2001, despite unfavorable economic conditions, we continued to invest in the development of new products in order to maintain our competitive position. Excluding the $6.3 million one-time acquired in-process research and development charge taken in 2000, research and development expenses remained relatively flat in 2001 compared to 2000. During 2000, we recorded deferred stock-based compensation of $41.3 million for the acquisitions of DesignPRO Inc. and Right Track CAD Inc., which is being amortized to research and development expenses over a period of three to four years. Amortization of deferred stock-based compensation included in research and development expenses was $8.2 million in 2002, $13.8 million in 2001, and $8.3 million in 2000.

We will continue to make significant investments in the development of new products and focus our efforts on the development of new PLDs and hardware that utilize advanced semiconductor wafer fabrication processes, as well as related development software. We are currently investing in the development of our Cyclone, Stratix, Stratix GX, and HardCopy families, our Quartus II software, and other future products.

SELLING, GENERAL, AND ADMINISTRATIVE EXPENSES : Selling, general, and administrative expenses were $168.5 million, or 23% of sales, in 2002 compared to $215.3 million, or 26% of sales in 2001 and $210.0 million, or 15% of sales, in 2000. Selling, general, and administrative expenses primarily include salary expenses related to sales, marketing, and administrative personnel, commissions and incentives, depreciation, legal, advertising, facilities, and travel and entertainment expenses.

Selling, general, and administrative expenses decreased $46.8 million, or 22%, in 2002 compared to 2001. The decrease was primarily due to spending control measures including the restructuring program implemented in 2001, lower expenses for labor, advertising, recruiting, travel, and entertainment, as well as reduced litigation expenses stemming from the settlement of our litigation with Xilinx and Lattice Semiconductor Corporation. We expect that selling, general, and administrative expenses will increase in 2003 to be in the range of $175 million to $185 million.

Selling, general, and administrative expenses increased slightly in 2001 compared to 2000. Despite the slight increase, the rate of spending dropped steadily during the year primarily due to spending control measures. Spending in the fourth quarter of 2001 decreased 23% from our peak spending in the first quarter of 2001.

RESTRUCTURING AND OTHER SPECIAL CHARGES : During 2001, we recorded restructuring and other special charges of $47.7 million in connection with our plan to reduce future operating expenses and to align our organization’s cost structure with a reduction in projected sales resulting from unfavorable economic conditions. The charges consisted of severance and fringe benefits related to our workforce reduction of approximately 152 employees primarily in selling, general, and administrative functions. The charges also included the write-down associated with the spin-off of Northwest Logic, the write-down of certain equipment and intangible assets, the consolidation of excess facilities, and the termination of certain license agreements. In addition, we made a one-time payment of $20.0 million as part of our patent litigation settlement with Xilinx. These charges were classified as operating expenses in 2001 in our consolidated statement of operations.

The following table summarizes the charges in 2001 and the activity related to the restructuring liability during 2001 and 2002:

Cash expenditures relating to workforce reductions have been substantially paid. Amounts related to non-cancelable leases will be paid over their respective terms through the third quarter of 2005. The restructuring liability, totaling $0.5 million as of December 31, 2002, is included in accrued liabilities in our consolidated balance sheet.

IN-PROCESS RESEARCH AND DEVELOPMENT : During 2000, we recorded a non-recurring charge of $6.3 million to in-process research and development related to the acquisition of DesignPRO and Right Track. We determined this non-recurring charge using valuation techniques generally used by appraisers in the high-technology industry. We immediately expensed this non-recurring charge in the period of acquisition because technological feasibility had not been established and no alternative use had been identified. As of December 31, 2002, we believe that the projections used in the valuations with respect to each acquisition are still materially valid; however, there can be no assurance that the projected results will be achieved.

INCOME (LOSS) FROM OPERATIONS : Income from operations was $97.4 million, or 14% of sales, in 2002 compared to a loss from operations of $53.2 million, or 6% of sales, in 2001 and income from operations of $521.2 million, or 38% of sales, in 2000. The increase in income from operations in 2002 was primarily due to the inventory, restructuring, and other special charges taken during 2001. Excluding these charges, income from operations in 2001 was $149.0 million, or 18% of sales. On that basis, the decrease in income from operations compared to last year was due to the decrease in sales and gross margin percentage, partially offset by the decrease in total operating expenses.

Loss from operations in 2001 was primarily due to a decline in sales, as well as the inventory write-down, restructuring, and other special charges.

INTEREST AND OTHER INCOME, NET : Interest and other income was $26.0 million, or 3% of sales, in 2002 compared to $40.2 million, or 4% of sales, in 2001 and $46.1 million, or 3% of sales, in 2000. Interest and other income consists mainly of interest income generated from investments in high-quality fixed income securities. The year over year declines in both 2002 and 2001 were primarily due to lower market interest rates.

PROVISION FOR INCOME TAXES : Our effective tax rates were 26% for 2002, (206%) for 2001, and 33% for 2000. Excluding the inventory, restructuring, and other special charges taken in 2001 and a one-time gain on the sale of WaferTech, LLC in 2000, our effective tax rates were 26% for 2002, 30% for 2001, and 31% for 2000. The reduction of the effective tax rate, as measured on this basis, over the three year period primarily resulted from the increased impact of tax-exempt income and research and development tax credits, as well as a change in the geographic mix of income. We expect that our effective tax rate for 2003 will be approximately 27%.

EQUITY INVESTMENT : On December 27, 2000, we sold our 23% ownership interest in WaferTech to a subsidiary of TSMC for $350.4 million in cash. The one-time pre-tax gain on the sale was $178.1 million. Through December 27, 2000, we accounted for our investment under the equity method based on our ability to exercise significant influence over WaferTech’s operating and financial policies. Our equity in the loss of WaferTech was $1.4 million for 2000.

YEAR 2002 : We ended 2002 with $942.7 million of cash, cash equivalents, and short-term investments available to finance our operating activities and future growth. Since our inception, we have used a combination of equity and debt financing and cash generated from operations to support our operating activities, capital expenditures, acquisitions and investments, and repurchases of our common stock under our stock repurchase program.

In 2002, we spent $139.5 million to repurchase our common stock, compared to $183.2 million in 2001, and $555.5 million in 2000. We also spent $9.9 million to purchase capital equipment in 2002, compared to $65.8 million in 2001, and $87.5 million in 2000. We believe that capital expenditures will be higher in 2003 compared to 2002. We also lease facilities under non-cancelable lease agreements expiring at various times through 2009. Rental expense amounted to $6.3 million in 2002. We anticipate that our lease payments in 2003 will approximate 2002. We believe the available sources of funds including cash, cash equivalents, and short-term investments, and cash we expect to generate from operations will be adequate to finance our activities for at least the next year.

Cash and cash equivalents increased $110.4 million, or 76%, to $255.4 million at December 31, 2002 from $145.0 million at December 31, 2001. The increase resulted from $247.7 million provided by operating activities, net of $42.2 million used for investing activities and $95.1 million used for financing activities. Our positive cash flow from operations was primarily attributable to net income, depreciation and amortization, amortization of deferred stock-based compensation, decreases in other current assets resulting primarily from the receipt of a tax refund, inventories, and deferred income taxes, as well as an increase in accounts payable and accrued compensation. These items were partially offset by an increase in accounts receivable.

During 2002, cash used for investing activities of $42.2 million primarily consisted of purchases of short-term investments and capital equipment. These items were partially offset by proceeds from the maturity and sale of short-term investments. Cash used for financing activities of $95.1 million resulted from the repurchase of 8.9 million shares of our common stock, which was partially offset by net proceeds from the issuance of 6.1 million shares of our common stock to employees through various option plans and our employee stock purchase plan.

YEAR 2001 : We ended 2001 with $805.7 million of cash, cash equivalents, and short-term investments. Cash and cash equivalents decreased $351.3 million, or 70.8%, to $145.0 million at December 31, 2001 from $496.4 million at December 31, 2000. The decrease resulted from $118.3 million used for operating activities, $84.1 million used for investing activities, and $148.9 million used for financing activities. Our negative cash flow from operations was primarily attributed to our net loss, decreases in deferred income on sales to distributors, accounts payable and accrued liabilities, and income taxes payable, and an increase in other current assets. These items were partially offset by depreciation and amortization, amortization of deferred stock-based compensation, and decreases in inventories, accounts receivable, and deferred income taxes.

During 2001, cash used for investing activities of $84.1 million consisted of purchases of capital equipment, short-term investments, and long-term investments. Cash used for financing activities of $148.9 million resulted from the repurchase of 7.2 million shares of our common stock, which was partially offset by net proceeds from the issuance of 4.3 million shares of our common stock to employees through various option plans and our employee stock purchase plan.

EMPLOYEES : We had 1,882 employees at the end of 2002, 1,987 employees at the end of 2001, and 1,947 employees at the end of 2000.

IMPACT OF CURRENCY TRANSLATION AND INFLATION : We purchase the majority of our materials and services in U.S. dollars and sell our products to OEMs and distributors in U.S. dollars. As of December 31, 2002, we had no open forward contracts; however, we may enter into contracts from time to time to hedge foreign exchange exposure. We have, in the past, entered into forward contracts to hedge against currency fluctuations associated with contractual commitments denominated in foreign currencies. During 2000, we entered into a forward exchange contract to purchase Malaysian ringgits to meet a portion of our firm contractual commitments to be paid in ringgits. The contract was settled in June 2001.

COMMON STOCK REPURCHASES : During fiscal 2002, we repurchased 8.9 million shares of common stock for an aggregate cost of $139.5 million, compared to 7.2 million shares for an aggregate cost of $183.2 million in fiscal 2001, and 17.1 million shares of common stock for an aggregate cost of $555.5 million in fiscal 2000. In October 2002, our Board of Directors approved an increase in the shares authorized for repurchase from 48.0 million shares to 68.0 million shares. Since the inception of our repurchase program in 1996, through December 31, 2002, we have repurchased a total of 46.0 million of the 68.0 million shares authorized for repurchase. All shares were retired upon acquisition.

OFF-BALANCE SHEET ARRANGEMENTS : We do not have any financial partnerships with unconsolidated entities, such as entities often referred to as structured finance or special purpose entities, which are often established for the purpose of facilitating off-balance sheet arrangements or other contractually narrow or limited purposes.

NEW ACCOUNTING PRONOUNCEMENTS : In June 2002, the Financial Accounting Standards Board, or FASB, issued Statement of Financial Accounting Standards No. 146, or SFAS No. 146, “Accounting for Costs Associated with Exit or Disposal Activities.” SFAS No. 146 addresses financial accounting and reporting for costs associated with exit or disposal activities and nullifies Emerging Issues Task Force No. 94-3, or EITF Issue No. 94-3, “Liability Recognition for Certain Employee Termination Benefits and Other Costs to Exit an Activity (including Certain Costs Incurred in a Restructuring).” This Statement requires that a liability for costs associated with an exit or disposal activity be recognized and measured initially at fair value only when the liability is incurred. SFAS No. 146 is effective for exit or disposal activities initiated after December 31, 2002. If we engage in any exit or disposal activities in the future, the adoption of SFAS No. 146 might have a material effect on future financial statements.

In November 2002, the FASB issued FIN No. 45, “Guarantor’s Accounting and Disclosure Requirements for Guarantees, Including Indirect Guarantees of Indebtedness of Others.” FIN No. 45 requires that a liability be recorded in the guarantor’s balance sheet upon issuance of a guarantee. In addition, FIN No. 45 requires disclosures about the guarantees that an entity has issued, including a reconciliation of changes in the entity’s product warranty liabilities. The initial recognition and initial measurement provisions of FIN No. 45 are applicable on a prospective basis to guarantees issued or modified after December 31, 2002, irrespective of the guarantor’s fiscal year-end. The disclosure requirements of FIN No. 45 are effective

RISK FACTORS : The following risk factors, among others, have affected and, in the future, could affect our actual results of operations and could cause our actual results to differ materially from those expressed in forward-looking statements made by us. Before you decide to buy, hold, or sell our common stock, you should carefully consider the risks described below, in addition to the other information contained elsewhere in this report. The following risk factors are not the only risk factors facing our company. Additional risks and uncertainties not presently known to us or that we currently deem immaterial may also affect our business. If any of these known or unknown risks or uncertainties actually occurs, our business, financial condition, and results of operation could be seriously harmed. In that event, the market price for our common stock could decline, and you may lose all or part of your investment.

Our financial results depend on our ability to compete successfully in the highly competitive semiconductor industry.

The programmable logic industry is intensely competitive. Our ability to compete successfully in the industry will depend on our ability to develop, manufacture, and sell complex semiconductor components and development tools that offer customers greater value than solutions offered by competing vendors such as Xilinx and Lattice.

Because we develop PLDs for applications that are presently served by vendors of ASICs and processor-related products, such as microcontrollers and DSPs, we also indirectly compete in the markets for ASICs, microcontrollers, and DSPs. Many of these vendors, including Analog Devices, Inc., International Business Machines Corporation, LSI Logic Corporation, and Texas Instruments Inc. have substantially greater financial, technical, and marketing resources than we do and have well-established market positions and solutions that have been proven technically feasible and economically competitive over several decades. We may not be able to displace these vendors in the targeted applications and densities. Further, other programmable logic vendors are targeting these applications and may be successful in securing market share from us. Moreover, our customers have historically used standard cell technologies to achieve greater integration in their systems; this may not only impede our efforts to penetrate the markets for ASICs, microcontrollers, and DSPs, but may also displace our products in the applications that we presently serve.

Our future success depends on our ability to define, develop, and sell new products that achieve market acceptance.

As a semiconductor company, we operate in a dynamic market characterized by rapid technological change. Our current product development efforts focus on developing new PLDs, related development software and hardware, and advanced semiconductor wafer fabrication processes. Our development efforts may not result in the timely introduction of competitive new products, enhancements to existing products in response to both evolving demands of the marketplace and competitive product offerings, and/or market acceptance of new and existing products.

We depend entirely on independent subcontractors to supply us with finished silicon wafers.

We depend entirely upon subcontractors to manufacture our silicon wafers. We purchase nearly all of our silicon wafers from Taiwan Semiconductor Manufacturing Company, or TSMC, and the remaining portion from Sharp Corporation. Silicon wafer production facilities have at any given time a fixed capacity, the allocation of which is determined solely by our vendors and over which we have no direct control. We have no formalized long-term commitment from our foundry suppliers. If market demand for silicon wafers suddenly exceeds market supply, our supply of silicon wafers can become limited quickly. A shortage in foundry manufacturing capacity could hinder our ability to meet demand for our products. Moreover, silicon wafers constitute more than half of our product cost. If we are unable to procure wafers at favorable prices, our gross margins will be adversely affected.

To ensure the continued supply of wafers, we may establish other sources of wafer supply for our products as such arrangements become economically advantageous or technically necessary. However, there are only a few foundries that have the capabilities to manufacture our products. If we engage alternative sources of supply with foundries that have the capabilities to manufacture our products, we may encounter start-up difficulties. Also, shipments could be delayed significantly while such sources are qualified for volume production.

In addition to sufficient foundry manufacturing capacity, we depend on good production yields and timely delivery of silicon wafers to meet our customers’ demand for products and to maintain profit margins. The manufacture of CMOS wafers is a

highly complex process. Wafer production yields depend on a wide variety of factors, including the level of contaminants in the manufacturing environment, impurities in the materials used, and the performance of personnel and equipment. As is common in the semiconductor industry, we have experienced, and may experience from time to time, problems with achieving acceptable production yields and timely delivery from our foundry vendors.

Difficulties in production yields can often occur when we begin production of new products, when we transition to new processes, or when our principal wafer supplier, TSMC, moves production of a product from one manufacturing plant to another, or manufactures the same product at multiple factories. Further, production throughput times vary considerably among our wafer suppliers and among the various factories used by our wafer suppliers, and we may experience delays from time to time in processing some of our products. These difficulties and delays can potentially result in significantly higher costs and lower product availability. We have in the past experienced supply shortages. For example, from the fourth quarter of 1999 through the first half of 2000, process control issues associated with volume ramp up at a wafer supplier resulted in low die yields on our FLEX 10KA and FLEX 10KE products, thereby leading to reduced product availability in these families. As a result, we were unable to support distributor stocking at desired levels and in some cases could not meet end customer demand.

We expect that, to maintain or enhance our competitive position, we will continue to introduce new products using, and convert established products to, new and more advanced process technologies. For example, our Stratix family is manufactured on a 0.13-micron, all-layer-copper interconnect process for which there is limited production history. We will also continue to transition our fabrication process arrangements to larger wafer sizes and smaller circuit geometries. Such transitions entail inherent technological risks and start-up difficulties that can adversely affect yields, costs, and timeliness of delivery. To enhance our product designs and cost structure, we depend on all of our subcontractors, and especially our principal foundry partner, TSMC, to improve process technologies in a timely manner.

We depend on independent subcontractors, located primarily in Asia, to assemble and test our semiconductor products.

Independent subcontractors, located primarily in Asia, assemble and test our semiconductor products. Because we rely on independent subcontractors to perform these services, we cannot directly control our product delivery schedules or quality levels. For example, in the second quarter of 1999, difficulties with a subcontractor’s manufacturing process limited the availability of packaging materials (piece parts) used in certain of our proprietary FineLine BGA, or ball-grid array, packages, thereby causing limited production. This in turn limited shipments of our FLEX 10KE product family.

Our future success also depends on the financial viability of our independent subcontractors. The recent reduction in overall demand for semiconductor products has financially stressed certain of our subcontractors and has weakened their capital structures. If the capital structures of our independent subcontractors further weaken, we may experience future product shortages, quality assurance problems, increased manufacturing costs, and/or supply chain disruption.

Conditions outside the control of our independent subcontractors may impact their business operations.

The economic, market, social, and political situations in countries where certain independent subcontractors are located are unpredictable, can be volatile, and can have a significant impact on our business because we may not be able to obtain product in a timely manner. Market conditions, including currency fluctuation, political strife, labor disruption, power shortages, and other factors, including natural or man-made disasters, adverse changes in tax laws, tariff, or freight rates, or interruption in air transportation, in areas where our independent subcontractors are located also could have a severe negative impact on our operating capabilities. For example, in September 1999, a major earthquake struck Taiwan, resulting in widespread physical damage and loss of life. The earthquake halted wafer fabrication production at our primary vendor, TSMC, for several days and then only limited production began. Nearly two weeks passed before full production resumed, and a portion of the inventory in the production process was scrapped as a result of damage incurred during the earthquake. Our independent subcontractors may experience similar or more severe problems in the future as a result of similar events.

Our intellectual property rights may not provide meaningful protection from our competitors.

We rely significantly on patents to protect our intellectual property rights. As of December 31, 2002, we held a total of 587 issued United States patents and 140 patents issued in other countries relating to various aspects of our products and technology and had a number of patent applications pending. Our patents and patent applications may not provide meaningful protection from our competitors. Our competitors may be able to circumvent our patents or develop new

patentable technologies that displace our existing products. Further, we may not be able to timely develop or patent new technologies, and those patents granted to us may not be valuable in all markets or may not enable us to develop new products that achieve market acceptance. Also, from time to time in the normal course of business, we receive and make inquiries with respect to possible patent infringements. As a result of inquiries received from third parties, it may be necessary or desirable for us to obtain licenses relating to one or more of our current or future products. We may not be able to obtain such licenses on reasonable terms.

In addition to patent protection, we rely on trademark, trade secret, copyright, and mask work laws to protect our unpatented proprietary information or technologies. Despite our efforts to protect our proprietary rights from unauthorized use or disclosure, parties, including our former employees or consultants, may attempt to disclose, obtain, or use our proprietary information or technologies without our authorization. Other companies may also develop substantially equivalent proprietary information or technologies or infringe on our trademarks and service marks, potentially causing our brand recognition to decline. The steps we have taken may not prevent misappropriation of our proprietary information and technologies, particularly in foreign countries where laws or law enforcement practices may not protect our proprietary rights as fully as in the United States. If other companies obtain our proprietary information or technologies or develop substantially equivalent information or technologies, they may develop products that compete against ours products.

We may face significant costs arising from intellectual property litigation.

Intellectual property claims brought against us, regardless of their merit, can result in costly litigation and the diversion of our financial resources and technical and management personnel. Legal proceedings also tend to be unpredictable and may be affected by events outside of our control. Further, we may not succeed in defending or enforcing our intellectual property rights. If we are not successful in defending or enforcing our intellectual property rights, third parties may obtain significant monetary damages or an injunction against the manufacture and sale of one or more of our product families.

We have been a party to lawsuits and may in the future become a party to lawsuits involving various types of claims, including, but not limited to, unfair competition and intellectual property matters. In July 2001, we entered into a settlement agreement with Xilinx under which we settled all pending litigation with Xilinx. As part of the settlement agreement, we entered into a royalty-free patent cross license agreement with Xilinx, including a prohibition against further patent litigation between the two companies through July 2006. In connection with the settlement agreement, we paid Xilinx a one-time payment of $20 million. Prior to the settlement with Xilinx, we devoted substantial financial resources over an eight-year period to the Xilinx litigation. Similarly, in July 2001, we entered into a settlement agreement with Lattice under which we settled all pending patent litigation with Lattice. As part of the settlement agreement with Lattice, we entered into a royalty-free patent cross license agreement with Lattice, including a multi-year prohibition against further patent litigation between the two companies. No payments were made by Altera or Lattice as part of the settlement.

We generally warrant our products against defects in materials and workmanship for varying lengths of time. If there is a material increase in the rate of customer claims or our estimates of probable losses relating to specifically identified warranty exposures are inaccurate, we may record a charge against future cost of sales. Warranty expense has historically been immaterial.

We depend on distributors to generate sales and fulfill our customer orders.

Worldwide sales through distributors accounted for more than ninety-five percent of our total sales during 2002. We rely on several distributors to assist us in creating customer demand, providing technical support and other value-added services to our customers, filling customer orders, and stocking our products. Our contracts with our distributors may be terminated by either party in a relatively short period of time.

Our distributors are located all over the world and are of various sizes and financial strength. The recent economic downturn has placed financial strain on our distributors. Lower sales, lower earnings, debt downgrades, the inability to access capital markets, and higher interest rates could potentially impact our distributors’ financial operations.

We are highly dependent on Arrow Electronics, Inc. in many locations across the world, particularly in North America. During 2002, Arrow on a worldwide basis accounted for approximately 53% of sales, and the next largest distributor

accounted for approximately 14% of sales. As of December 31, 2002, Arrow accounted for approximately 29% of total accounts receivable, while the next largest distributor accounted for 24% of total accounts receivable.

From time to time, our distributors may accept returns from end customers as they deem necessary in the ordinary course of business. Returns from end customers to our distributors are negative sales transactions and reduce our reported sales. Large returns could have a material impact on our forecasted and/or actual sales.

The length of our design-in and sales cycle could impact our future sales.

Our sales depend on our products being designed into our end customers’ products and those products achieving volume production. Our products are very complex in nature, and the time from design-in to volume production ranges from 6 months to 3 years. From initial product design-in to volume production, many factors could impact the timing of our sales or our ability to generate sales. These factors, include, but are not limited to, the competitive position of our technology, customer adoption of our products and tools, the competitiveness of our customers’ products in the markets they serve, our customers’ financial stability, and our ability to ship products according to our customers’ schedule.

During each of the last two years, international sales were a majority of our total sales. During 2002, international sales constituted approximately 60% of our total sales. Risks related to our foreign operations include unfavorable economic, market, political, and social conditions in a specific country or region, fluctuation in foreign currency exchange rates, foreign currency weakness against the United States dollar, adverse changes in tax laws, increased freight costs, interruptions in air transportation, reduced protection for intellectual property rights in some countries, generally longer receivable collection periods, and natural or man-made disasters in a specific country or region where we sell our products. Our business is also subject to the risks associated with the imposition of legislation and regulations relating specifically to the importation or exportation of semiconductor products. Quotas, duties, tariffs, taxes, or other charges, restrictions, or trade barriers may be imposed by the United States or other countries upon the importation or exportation of our products in the future.

Our business is subject to tax risks associated with being a multinational corporation.

As a multinational corporation, we conduct our business in many countries and are subject to taxation in many jurisdictions. The taxation of our business is subject to the application of multiple and sometimes conflicting tax laws and regulations as well as multinational tax conventions. The application of tax law is subject to legal and factual interpretation, judgment, and uncertainty. Tax laws themselves are subject to change as a result of changes in fiscal policy, changes in legislation, evolution of regulation, and court rulings. Consequently, taxing authorities may impose tax assessments or judgments against us that could materially impact our tax liability and/or our effective income tax rate.

Our gross margins may fluctuate depending on many factors, including, but not limited to, our product mix, market acceptance of our new products, competitive pricing dynamics, geographic and/or business segment pricing strategies, and various manufacturing cost variables.

Our financial results are affected by general economic conditions and the cyclical nature of the semiconductor industry.

The semiconductor industry is highly cyclical, which means that semiconductor companies such as Altera experience significant fluctuations in sales and profitability. The semiconductor industry has been significantly impacted by the recent economic downturn and contraction in the computing and communication equipment markets and by the ensuing inventory correction in the supply chain for those industries. This downcycle, like many of the preceding downcycles, has resulted in significant reductions in unit demand, excess customer inventories, price erosion, and excess production capacity. We experienced five consecutive declines in quarterly sales beginning in the fourth quarter of 2000 and ending in the fourth quarter of 2001. The protracted deceleration resulted in a peak-to-trough decline in quarterly sales of nearly 60%. We anticipate that the cyclical nature of the semiconductor industry will persist and that our sales will fluctuate accordingly.

In addition to reductions in sales, our profitability decreases during downturns as we are unable to reduce our expenses at the same rate as our sales decline. For example, at the height of the previous upcycle, in the third quarter of 2000, our operating

expenses were less than 27% of sales compared to almost 50% of sales in the most recent quarter. Similarly, our gross margins tend to deteriorate during downcycles. For example, in the third quarter of 2000, our reported gross margin was over 66% of sales compared to 61% (excluding the benefit from the sale of inventory previously written down) of sales in the most recent quarter. Furthermore, the recent industry contraction was prolonged and severe and resulted in inventory charges of $154.5 million in 2001 relating primarily to the write-off of inventories in excess to projected demand. Additionally, as a result of reduced demand and in an effort to reduce our ongoing expense levels, we incurred restructuring charges and write-downs totaling $48 million in 2001. In the year ended December 31, 2000, our net income was $497 million on sales of $1.4 billion whereas for the year ended December 31, 2001, we reported a net loss of $40 million on sales of $839 million. We expect that our future sales and profitability will continue to be volatile.

Last year in an effort to reduce the possibility of future charges for excess inventory, we reduced our inventory carrying targets. Our customers typically order product with less delivery lead time than our manufacturing cycle time. The recently implemented reduction in targeted inventory carrying levels may result in poorer delivery performance relative to our customers’ desired lead times, which over time may erode our competitive position and result in a loss of market share. Moreover, we may not achieve our targeted inventory reductions and we may experience inventory write-downs in the future.

Our quarterly operating results may fluctuate in the future as a result of a number of factors, including:


	•	the cyclical nature of the semiconductor industry;

	•	the cyclical nature of demand for our customers’ products;

	•	general economic, market, political, and social conditions in the countries where we sell our products;

	•	demand for our products and the products of our customers;

	•	the pricing of our products and the products of our competitors;

	•	the gain or loss of a key customer;

	•	the timing of our and our competitors’ new product introductions;

	•	our inventory levels and product obsolescence;

	•	the scheduling, rescheduling, and cancellation of large orders by our customers;

	•	the availability of adequate supply commitments from our wafer foundries and assembly and test subcontractors;

	•	our ability to develop new process technologies and achieve volume production at the foundries of TSMC or Sharp;

	•	changes in manufacturing yields;

	•	changes in distribution partners or their financial stability;

	•	adverse movements in exchange rates, interest rates, or tax rates; or

	•	litigation expenses, including those litigation expenses incurred in connection with the defense or enforcement of our intellectual property rights.

Our future success depends on our ability to successfully compete with other technology firms in attracting and retaining key technical and management personnel.

Our future success depends, in large part, upon the continued service of our key management, technical, sales, and support employees, and on our ability to continue to attract and retain additional qualified employees. The competition for such employees is intense and the loss of key employees could prevent our sales and/or profits from increasing or could cause our sales and/or profits to decline.

Our business is subject to the risks of earthquakes and other catastrophic events.

Our corporate headquarters is located near major earthquake fault lines. A significant natural disaster, such as an earthquake, may cause significant disruption to our business. In addition, our computer systems are vulnerable to computer viruses, break-ins, and similar disruptions from unauthorized tampering. Further, our business is subject to the effects of war and acts of terrorism. Any catastrophic event, such as an earthquake or other natural disasters, the failure of our computer

Our insurance policies may not be adequate to fully offset the losses resulting from covered incidents. Additionally, we may not have coverage for certain losses. For example, our property insurance does not provide coverage for losses caused by earthquake or war and only provides limited coverage for acts of terrorism.

In recent years, the stock market has experienced extreme price volatility and the price of our common stock has been subject to wide fluctuations. The overall stock market, the prices of semiconductor stocks in general, and the price of our stock may continue to fluctuate greatly. We believe that factors such as quarter-to-quarter variances in financial results, announcements of new products, new orders, and order rate variations by us or our competitors could cause the market price of our common stock to fluctuate substantially. In addition, the stock prices for many technology companies experience large fluctuations, which are often unrelated to the operating performance of the specific companies. Broad market fluctuations, as well as general economic conditions such as a recessionary period or high interest rates, may cause the market price of our common stock to decline.

Our investment portfolio consisted of fixed income securities of $930.6 million as of December 31, 2002 and $738.3 million as of December 31, 2001. These securities, like all fixed income instruments, are subject to interest rate risk and will vary in value as market interest rates fluctuate. If market interest rates were to increase immediately and uniformly by 10% from levels as of December 31, 2002 and December 31, 2001, the decline in the fair value of the portfolio would not be material. Additionally, we anticipate holding our fixed income investments until maturity and, therefore, we do not expect to realize an adverse impact on income or cash flows.

We have international subsidiaries and branch operations and are, therefore, subject to foreign currency rate exposure. To date, our exposure to exchange rate volatility has been insignificant. If foreign currency rates were to fluctuate by 10% from rates at December 31, 2002 and December 31, 2001, our financial position and results of operations would not be materially affected. However, we cannot assure you that there will not be a material impact in the future.

Altera Corporation was founded in 1983 and reincorporated in the State of Delaware in 1997. We design, manufacture, and market high-performance, high-density programmable logic devices, or PLDs, pre-defined design building blocks known as intellectual property, or IP, cores, and associated development tools. Our PLDs are semiconductor integrated circuits that are manufactured as standard chips that our customers program to perform desired logic functions within their electronic systems. Our customers can license IP cores from us for implementation of standard functions in their PLD designs. Customers can also develop, compile, verify, and program their PLD designs using our proprietary development software, which operates on personal computers and engineering workstations. Our products serve a wide range of markets, including telecommunications, data communications, computing and storage, consumer, and industrial applications.

BASIS OF PRESENTATION : We have a fiscal year that ends on the Friday nearest December 31st. For presentation purposes, the consolidated financial statements and accompanying notes refer to our fiscal year end as December 31st. The consolidated financial statements include our accounts as well as our wholly-owned subsidiaries after elimination of all significant intercompany balances and transactions.

USE OF ESTIMATES : The preparation of financial statements in conformity with accounting principles generally accepted in the United States of America requires management to make estimates and assumptions that affect the reported amounts of assets and liabilities and disclosure of contingent assets and liabilities at the date of the financial statements and the reported amounts of revenues and expenses during the reporting period. Actual results could differ from those estimates, and material effects on our operating results and financial position may result.

CASH EQUIVALENTS AND SHORT-TERM INVESTMENTS : Cash equivalents consist of highly liquid investments with original maturities of three months or less. Short-term investments are classified as securities available for sale and are carried at their fair value based on quoted market prices as of the balance sheet date. The amortized cost of securities is adjusted for amortization of premiums and accretion of discounts to maturity. Such amortization is included in interest and other income, net. Realized gains or losses are determined on the specific identification method and are reflected in income. Net unrealized gains or losses are recorded directly in stockholders’ equity except those unrealized losses that are deemed to be other than temporary are reflected in income.

INVENTORIES : Inventories are recorded at the lower of cost on a first-in-first-out basis (approximated by standard cost) or market. Inventories at December 31, 2002 and 2001 were comprised of the following:

As a result of unfavorable economic conditions and diminished demand for semiconductor products beginning in late 2000, we experienced a sharp decline in sales and recorded total inventory charges of $154.5 million in 2001. These inventory charges were recorded in cost of sales in our consolidated statements of operations and related primarily to excess inventory for our APEX 20KE, FLEX 10KE, and MAX 7000A product families and assembly packaging materials. During the year ended December 31, 2002, we had a gross margin benefit of $18.0 million resulting from the sale of inventory previously written down in 2001.

PROPERTY AND EQUIPMENT y Property and equipment at December 31, 2002 and 2001 was comprised of the following:

Property and equipment are carried at cost less accumulated depreciation and amortization. Depreciation and amortization are computed using the straight-line method. Estimated useful lives of three to five years are used for equipment and office furniture and forty years for buildings. Amortization of leasehold improvements is computed using the shorter of the remaining facility lease term or the estimated useful life of the improvements. Depreciation expense was $43.2 million in 2002, $47.5 million in 2001, and $35.2 million in 2000.

Effective January 1, 2002, we evaluate the recoverability of our property, equipment, and intangible assets in accordance with Statement of Financial Accounting Standards No. 144, or SFAS No. 144, “Accounting for the Impairment or Disposal of Long-Lived Assets.” We regularly compare the carrying value of long-lived assets to our projection of future undiscounted cash flows attributable to such assets and in the event that the carrying value exceeds the future undiscounted cash flows, we record an impairment charge against income equal to the excess of the carrying value over the asset’s fair value. Prior to January 1, 2002, we evaluated our property, equipment, and intangible assets in accordance with SFAS No. 121, “Accounting for the Impairment of Long-Lived Assets and for Long-Lived Assets to be Disposed of.” Our adoption of SFAS No. 144 did not have a material effect on our consolidated financial statements.

FAIR VALUE OF FINANCIAL INSTRUMENTS : For certain of our financial instruments, including cash and cash equivalents, short-term investments, accounts receivable, accounts payable, and accrued liabilities, the carrying amounts approximate fair value due to their short maturities.

CONCENTRATIONS OF CREDIT RISK : Financial instruments that potentially subject us to concentrations of credit risk consist principally of cash, cash equivalents, short-term investments, and accounts receivable. We place our cash, cash equivalents, and short-term investments in a variety of financial instruments and, by policy, limit the amount of credit exposure through diversification and by restricting our investments to highly rated investment grade securities.

We sell our products to distributors and OEMs throughout the world. We perform ongoing credit evaluations of our customers’ financial condition and require credit guarantees whenever deemed necessary. For the year ended December 31, 2002, worldwide sales through distributors for subsequent resale to OEMs or their subcontract manufacturers accounted for over 95% of total sales. Arrow Electronics, Inc., or Arrow, was and continues to be our largest distributor. Arrow on a worldwide basis accounted for 53% of sales in 2002, 54% in 2001, and 58% in 2000. Our second largest distributor, Altima Corporation, accounted for 14% of sales in 2002, 13% in 2001, and 11% in 2000. For the years ended December 31, 2002, 2001, and 2000, no single end customer provided more than 10% of our sales.

At December 31, 2002, three distributors, each of which accounted for more than 10% of total accounts receivable, accounted for 29%, 24%, and 15% of total accounts receivable. We maintain allowances for doubtful accounts receivable. Provisions have been adequate to provide for losses. At December 31, 2001, three distributors, each of which accounted for more than 10% of total accounts receivable, accounted for 42%, 24%, and 12% of total accounts receivable.

REVENUE RECOGNITION : We recognize revenue on products sold to OEMs and end users upon shipment provided that persuasive evidence of an arrangement exists, the price is fixed, title has transferred, collection of resulting receivables is reasonably assured, there are no customer acceptance requirements, and there are no remaining significant obligations.

Reserves for OEM sales returns and allowances are recorded based on historical experience rates and for any specific significant and known pending customer returns or allowances. Our sales to distributors are made under agreements allowing for product returns and price adjustments or other credits under certain circumstances. We defer recognition of revenue on products sold to distributors until products are resold.

FOREIGN EXCHANGE CONTRACTS : We purchase the majority of our materials and services in U.S. dollars and transact our sales in U.S. dollars. As of December 31, 2002, we had no open forward contracts; however, we may enter into contracts from time to time to hedge foreign exchange exposure. We have, in the past, entered into forward contracts to hedge against currency fluctuations associated with contractual commitments denominated in foreign currencies. During 2000, we entered into a forward exchange contract to purchase Malaysian ringgits to meet a portion of our firm contractual commitments to be paid in ringgits. The contract was settled in June 2001.

INCOME TAXES : Our income tax provision is based on the asset and liability method prescribed by SFAS No. 109, “Accounting for Income Taxes.” Accordingly, our income tax provision is based on pre-tax financial accounting income. This approach recognizes the amount of taxes payable or refundable for the current year, as well as deferred tax assets and liabilities for the future tax consequences of events recognized in the financial statements and tax returns.

DEPENDENCE ON WAFER SUPPLIERS AND OTHER INDEPENDENT SUBCONTRACTORS : We do not directly manufacture finished silicon wafers. Our strategy has been to purchase silicon wafers from independent wafer foundries. We depend entirely upon subcontractors to manufacture our silicon wafers. We also depend on these wafer foundries to improve process technologies in a timely manner and to enhance our product designs and cost structure. We have no formalized long-term commitment from our foundry suppliers. If market demand for silicon wafers suddenly exceeds market supply, our supply of silicon wafers can become limited quickly. A shortage in foundry manufacturing capacity could hinder our ability to meet demand for our products. Moreover, silicon wafers constitute more than half of our product cost. If we are unable to procure wafers at favorable prices, our gross margins will be adversely affected.

We also depend on independent subcontractors, located primarily in Asia, for the testing and assembly of our semiconductor products. We cannot directly control our product delivery schedules or quality levels. In addition, the recent reduction in overall demand for semiconductor products has financially stressed certain of our subcontractors and has weakened their capital structures. If the capital structures of our independent subcontractors further weaken, we may experience future product shortages, quality assurance problems, increased manufacturing costs, and/or supply chain disruption.

STOCK-BASED COMPENSATION PLANS : We account for stock-based compensation using the intrinsic value method prescribed in Accounting Principles Board Opinion No. 25, or APB No. 25, “Accounting for Stock Issued to Employees.” Under APB No. 25, compensation cost is measured as the excess, if any, of the quoted market price of our stock at the date of grant over the exercise price of the option granted. Compensation cost for stock options, if any, is recognized ratably over the vesting period. We provide additional pro forma disclosures as required under SFAS No. 123, “Accounting for Stock-Based Compensation” and SFAS No. 148, “Accounting for Stock-Based Compensation, Transition and Disclosure” in Note 11: Stock-Based Compensation Plans.

FOREIGN CURRENCY TRANSLATION : The U.S. dollar is the functional currency for each of our foreign subsidiaries. Assets and liabilities that are not denominated in the functional currency are remeasured into U.S. dollars and the resulting gains or losses are included in “Interest and other income, net.” Such gains or losses have not been material for any period presented.

NEW ACCOUNTING PRONOUNCEMENTS : In June 2002, the Financial Accounting Standards Board, or FASB, issued SFAS No. 146, “Accounting for Costs Associated with Exit or Disposal Activities.” SFAS No. 146 addresses financial accounting and reporting for costs associated with exit or disposal activities and nullifies EITF Issue No. 94-3, “Liability Recognition for Certain Employee Termination Benefits and Other Costs to Exit an Activity (including Certain Costs Incurred in a Restructuring).” This Statement requires that a liability for costs associated with an exit or disposal activity be

recognized and measured initially at fair value only when the liability is incurred. SFAS No. 146 is effective for exit or disposal activities initiated after December 31, 2002. If we engage in any exit or disposal activities in the future, the adoption of SFAS No. 146 might have a material effect on future financial statements.

During 2001, we recorded restructuring and other special charges of $47.7 million in connection with our plan to reduce future operating expenses and to align our organization’s cost structure with a reduction in projected sales resulting from unfavorable economic conditions. The charges consisted of severance and fringe benefits related to our workforce reduction of approximately 152 employees primarily in selling, general, and administrative functions. The charges also included the write-down associated with the spin-off of Northwest Logic, the write-down of certain equipment and intangible assets, the consolidation of excess facilities, and the termination of certain license agreements. In addition, we made a one-time payment of $20.0 million as part of our patent litigation settlement with Xilinx. These charges were classified as operating expenses in 2001 in our consolidated statement of operations.

The following table summarizes the charges in 2001 and the activity related to the restructuring liability during 2001 and 2002:

In accordance with SFAS No. 128, “Earnings Per Share,” we compute basic income (loss) per share by dividing net income (loss) available to common stockholders by the weighted average number of common shares outstanding during the period (excluding the dilutive effect of stock options and restricted stock). Diluted income per share reflects the dilution of potential common shares outstanding during the period. In computing diluted income per share, we adjust share count by assuming that all in-the-money options are exercised and that we repurchase shares with the proceeds of these hypothetical exercises along with the tax benefit resulting from the hypothetical option exercises. We further assume that any unamortized deferred stock-based compensation is also used to repurchase shares. In determining the hypothetical shares repurchased, we use the average stock price for the period.

Diluted income per share excludes out-of-the-money stock options and unvested restricted stock totaling 30.7 million shares for 2002, as their effect is anti-dilutive. Anti-dilutive options and unvested restricted stock totaled 25.5 million shares for 2001. The anti-dilutive options and unvested restricted stock were immaterial for the year ended December 31, 2000. While these options are currently anti-dilutive, they could be dilutive in the future. A reconciliation of basic and diluted income (loss) per share is presented below:

Our portfolio of marketable securities at December 31 consists of the following:

Our portfolio of marketable securities by contractual maturity at December 31 is as follows (in thousands):

We record net unrealized gains or losses in stockholders’ equity. Realized gains or losses are reflected in income and were immaterial for all periods presented.

We completed the acquisitions of all outstanding capital stock of DesignPRO Inc., a developer and provider of intellectual property cores and custom design solutions, on April 19, 2000, Right Track CAD Inc., a developer of architectural and computer aided design tools for advanced PLDs, on May 1, 2000, and Northwest Logic, Inc., a provider of system design services and intellectual property specializing in telecommunications, data communications, and embedded processor systems design, on September 11, 2000. Northwest Logic was subsequently spun-off in December 2001.

We issued 934,381 shares of our common stock and paid approximately $11.5 million in cash, net of cash acquired of $0.3 million, for all of the capital stock of DesignPRO, Right Track, and Northwest Logic. In addition, we granted options to purchase 323,146 shares of our common stock in exchange for all of the stock options outstanding of DesignPRO and Right Track. The fair value of our shares issued was approximately $45.3 million and the fair value of our options granted was approximately $14.6 million. Certain shares issued are subject to our repurchase rights under certain circumstances. We incurred direct acquisition costs of approximately $0.4 million, which were included in the purchase price. Total consideration for the three acquisitions was $72.1 million. The acquisitions were accounted for under the purchase method of accounting. The purchase price was allocated to the tangible and intangible assets acquired and liabilities assumed based in part on an independent appraisal of their respective fair values. Total consideration paid in connection with the acquisitions was attributable to the following:

No supplemental pro forma information is presented due to the immaterial effect on prior period results of operations. The allocation of amounts to market ready technology and in-process research and development were consistent with widely recognized appraisal practices. Our analysis resulted in a valuation of market ready technology at $21.4 million. Market ready technology represents technologies that have reached technological feasibility, and therefore can be capitalized. We are amortizing the market ready technology on a straight-line basis over a period of three to six years. Our analysis also resulted in a $6.3 million charge to acquired in-process research and development. The acquired in-process technology represents the appraised value of technologies in the development stage that had not yet reached technological feasibility and do not have alternative future uses. We expensed this amount as a non-recurring charge upon consummation of the acquisitions.

We determined the value assigned to in-process research and development by identifying research projects in areas for which technological feasibility had not been established. For both the Right Track and DesignPRO valuations, we estimated the expected cash flows from the projects once commercially viable. We then discounted the net cash flows back to their present value and applied a percentage of completion. We determined the percentage of completion using milestones representing our management’s estimate of effort, value added, and degree of difficulty of the portion of each project completed as of the acquisition date, as compared to the remaining research and development to be completed to bring each project to technical feasibility.

If we do not successfully develop our research projects discussed above, our sales and profitability may be adversely affected in future periods and the value of other intangible assets acquired may become impaired. Our management believes that the in-process research and development charge is valued consistently with the SEC staff’s current views regarding valuation methodologies. We cannot assure you that the SEC staff will not take issue with any assumptions used in our valuation model and require us to revise the amount allocated to in-process research and development. As of December 31, 2002, we

On December 27, 2000, we sold our 23% ownership interest in WaferTech, LLC to a subsidiary of Taiwan Semiconductor Manufacturing Company, or TSMC, for $350.4 million in cash. The one-time pre-tax gain on the sale was $178.1 million. Through December 27, 2000, we accounted for our investment under the equity method based on our ability to exercise significant influence over WaferTech’s operating and financial policies. Our equity in the loss of WaferTech was $1.4 million for 2000.

At December 31, 2002, our long-term investments and other assets of $11.6 million consisted primarily of intangible assets acquired in connection with the acquisition of Right Track of approximately $9.3 million, net of $8.3 million of accumulated amortization, and other intangible assets. These intangible assets will be amortized on a straight-line basis through 2005. At December 31, 2001, our long-term investments and other assets of $14.8 million consisted primarily of intangible assets acquired in connection with the acquisition of Right Track of approximately $12.4 million, net of $5.2 million of accumulated amortization.

We lease facilities under non-cancelable lease agreements expiring at various times through 2009. The leases generally require us to pay property taxes, insurance, maintenance, and repair costs. Future minimum lease payments under all non-cancelable operating leases are as follows:

We have the option to extend or renew most of our leases. Rental expense under all operating leases amounted to $6.3 million in 2002, $5.9 million in 2001, and $3.5 million in 2000.

COMMON STOCK REPURCHASES : During fiscal 2002, we repurchased 8.9 million shares of common stock for an aggregate cost of $139.5 million, compared to 7.2 million shares for an aggregate cost of $183.2 million in fiscal 2001, and 17.1 million shares of common stock for an aggregate cost of $555.5 million in fiscal 2000. In October 2002, our Board of Directors approved an increase in the shares authorized for repurchase from 48.0 million shares to 68.0 million shares. Since the inception of our repurchase program in 1996, through December 31, 2002, we have repurchased a total of 46.0 million of 68.0 million shares authorized for repurchase. All shares were retired upon acquisition.

DEFERRED STOCK-BASED COMPENSATION : We recorded deferred stock-based compensation of $1.1 million during 2002 and $283,000 during 2001 representing the value of restricted stock issued to certain new employees. During 2000, we recorded aggregate deferred stock-based compensation of $58.9 million representing the value of restricted stock issued in conjunction with the acquisitions of DesignPRO and Right Track as well as stock options and restricted stock granted to certain new employees. Deferred stock-based compensation represents the difference between the sale price and the quoted market price of our stock on the date that restricted stock is sold to certain new employees. We amortize deferred

The restricted stock sold to the employees is subject to our repurchase rights under certain circumstances. These rights lapse over a three- to four-year period. During 2001, we repurchased 40,000 shares of restricted stock. At December 31, 2002, 417,478 shares were subject to our repurchase rights at the original sale prices.

At December 31, 2002, we had three stock-based compensation plans, which are described below. We account for stock-based compensation using the intrinsic value method prescribed in APB No. 25, “Accounting for Stock Issued to Employees.”

STOCK OPTION PLANS : Our stock option program is a broad-based, long-term retention program intended to attract, motivate, and retain talented employees as well as align stockholder and employee interests. We currently grant stock options under two plans: the 1996 Stock Option Plan, which provides for the periodic issuance of stock options to our employees, and the 1998 Director Stock Option Plan, which provides for the periodic issuance of stock options to members of our Board of Directors who are not employees.

Options granted under the 1996 Stock Option Plan will generally vest over four years at annual increments as determined by the Stock Option Plan Committee of the Board of Directors. All options under this plan have a maximum term of 10 years. In March 2001, the Board of Directors approved an amendment to the vesting period for grants under the 1998 Director Stock Option Plan. For any new director elected to the board, the first grant vests over four years, the next three subsequent grants vest over a one-year period after the first grant is fully vested, and all subsequent grants vest over the year following the date of grant. For current board members, this amendment to the vesting period applies to all future grants. Options granted prior to March 2001 generally vest over four years. All options under this plan have a maximum term of 10 years.

As of December 31, 2002, the 1996 Stock Option Plan had 68.0 million shares reserved for issuance and 7.6 million shares were available for future grants. The 1998 Director Stock Option Plan had 680,000 shares reserved for issuance and 343,000 shares were available for future grants.

Any shares reserved for issuance under the 1987 Stock Option Plan and the 1988 Director Stock Option Plan relating to ungranted stock options were canceled upon the adoption of the new option plans. As of December 31, 2002, under the 1987 Stock Option Plan, 5.5 million previously granted shares remained unexercised, while under the 1988 Director Stock Option Plan, 950,000 previously granted shares remained unexercised.

A summary of activity under all of our stock option plans and related weighted average exercise prices from 2000 through 2002 is as follows:

Options exercisable as of December 31, 2001 were 22.8 million at an average price of $9.90. Options exercisable as of December 31, 2000 were 15.9 million at an average price of $5.86.

EMPLOYEE STOCK PURCHASE PLAN : As of December 31, 2002, the 1987 Employee Stock Purchase Plan had 15.7 million shares of common stock reserved for issuance. Under the terms of the Employee Stock Purchase Plan, our employees, nearly all of whom are eligible to participate, can choose each year to have up to 10% of their eligible annual base earnings withheld, up to a maximum of $21,250, to purchase our common stock. Effective October 2001, the offering period was increased from six to twelve months. The purchase price of the stock is 85% of the lower of the closing price at the beginning of the twelve month offering period or at the end of each six-month purchase period. We do not recognize compensation cost related to employee purchase rights under this plan.

Sales under the Employee Stock Purchase Plan were 887,361 shares of common stock at an average price of $12.75 per share in 2002, 616,364 shares at an average price of $20.06 per share in 2001, and 423,988 shares at $22.05 per share in 2000. There were 1.8 million shares available for future purchases under the Employee Stock Purchase Plan as of December 31, 2002.

We received tax benefits of $11.5 million in 2002, $27.9 million in 2001, and $113.9 million in 2000 on the exercise of non-qualified stock options and on the disposition of stock acquired by exercise of incentive stock options or through the Employee Stock Purchase Plan.

PRO FORMA NET INCOME AND NET INCOME PER SHARE : The fair value of each option grant, as defined by SFAS No. 123, is estimated on the date of grant using the Black-Scholes option-pricing model. The Black-Scholes model, as well as other currently accepted option valuation models, was developed to estimate the fair value of freely tradable, fully transferable options without vesting restrictions that significantly differ from our stock option awards. These models also require highly subjective assumptions, including future stock price volatility and expected time until exercise, which greatly affect the fair value on the grant date.

To compute the estimated fair value of our stock option grants and shares purchased under the Employee Stock Purchase Plan, the Black-Scholes method was used with the following weighted-average assumptions and dividend yields of 0% for all years presented:

The estimated weighted-average fair value of options granted was $7.19 in 2002, $13.94 in 2001, and $19.06 in 2000. The estimated weighted-average fair value of shares purchased under the Employee Stock Purchase Plan was $6.40 in 2002, $10.50 in 2001, and $14.65 in 2000.

SFAS No. 148 amends SFAS No. 123 in December 2002 to require that disclosures of the pro forma effect of using the fair value method of accounting for stock-based employee compensation be displayed more prominently and in a tabular format. The following table illustrates the effect on our net income (loss) and net income (loss) per share if we had recorded compensation costs based on the estimated grant date fair value as defined by SFAS No. 123 for all granted stock-based awards.

Unremitted earnings of our foreign subsidiaries included in the consolidated retained earnings aggregate to approximately $84.9 million at December 31, 2002, $80.7 million at December 31, 2001, and $138.5 million at December 31, 2000. These earnings, which reflect full provision for foreign income taxes, are indefinitely reinvested in foreign operations.

The valuation allowances of $6.9 million at December 31, 2002, and $2.4 million at December 31, 2001 are attributable to acquired intangible assets. Sufficient uncertainty exists regarding the realizability of these assets and, accordingly, valuation allowances have been provided.

At December 31, 2001, income tax receivable of $73.2 million was classified as other current assets in our consolidated balance sheets which was received in 2002.

The exercise of non-qualified stock options and the disposition of stock acquired by exercise of incentive stock options or through the Employee Stock Purchase Plan resulted in a tax benefit of $11.5 million in 2002, $27.9 million in 2001, and $113.9 million in 2000. We receive an income tax benefit calculated as the tax effect of the difference between the fair market value of the stock issued at the time of exercise and the option price. These benefits are credited directly to stockholders’ equity.

The items accounting for the difference between income taxes computed at the federal statutory rate and the provision for income taxes are as follows:

In April 2002, we settled a suit brought against us by Cypress Semiconductor Corporation in the Santa Clara County Superior Court alleging tortious interference with existing contractual relations with Right Track CAD Inc., tortious interference with economic relations, misappropriation of trade secrets, and unfair competition. The companies agreed to release all claims against each other relating to the lawsuit without any admission of liability.

We operate in a single industry segment comprising of the design, development, manufacture, and sale of PLDs, IP cores, and associated development tools. Our sales by major geographic area (based on destination) were as follows:

The majority of our long-lived assets were located in the United States. Long-lived assets included property and equipment and long-term investments and other assets. Long-lived assets by country were as follows:

For the years ended December 31, 2002, 2001, and 2000, no single end customer provided more than 10% of our sales.

We have a plan to provide retirement benefits for our eligible employees, known as the Altera Corporation Savings and Retirement Plan, or the Plan. As allowed under Section 401(k) of the Internal Revenue Code, the Plan allows tax deferred salary deductions for eligible employees. Our Retirement Plans Committee administers the Plan. Participants in the Plan may make salary deferrals of up to 20% of the eligible annual salary, limited by the maximum dollar amount allowed by the Internal Revenue Code. For every dollar deferred under the Plan, we make a matching contribution equal to 100% up to the first 5% of the salary deferred with a maximum of $2,000 per participant per year. Effective January 1, 2002, we accelerated the vesting of matching contributions from five to three years. This amendment applies to matching contributions made prior to January 1, 2002. Effective January 1, 2003, participants who have reached the age of fifty before the close of the plan year may be eligible to make catch-up salary deferral contributions, limited by the maximum dollar amount allowed by the Internal Revenue Code. Catch-up contributions are not eligible for matching contributions. Our contributions to the Plan were $1.7 million in 2002, $2.2 million in 2001 and $1.3 million in 2000.

We allow our U.S.-based officers, director-level employees, and our board members to defer a portion of their compensation under the Altera Corporation Nonqualified Deferred Compensation Plan. Our Retirement Plans Committee administers the

plan. Plan participants self-direct their investments deferred under the plan. In the event the Company becomes insolvent, plan assets are subject to the claims of the general creditors. Since the inception of the plan, we have not made any matching or discretionary contributions to the plan. There are no plan provisions that provide for any guarantees or minimum return on investments. At December 31, 2002, there were approximately 110 participants in the plan and plan assets were approximately $40.9 million.

In addition, we also sponsor a retiree medical plan providing medical benefits to eligible retirees. Benefits are available to employees hired on or before July 1, 2002 who retire from Altera at or after age 55 if they have at least 10 years of service after age 45. To date, this plan has not had, and is not expected to have, a material effect on our consolidated financial statements.

In our opinion, the accompanying consolidated balance sheets and the related consolidated statements of operations, of stockholders’ equity and of cash flows present fairly, in all material respects, the financial position of Altera Corporation and its subsidiaries at December 31, 2002 and 2001, and the results of their operations and their cash flows for each of the three years in the period ended December 31, 2002, in conformity with accounting principles generally accepted in the United States of America. These financial statements are the responsibility of the Company’s management; our responsibility is to express an opinion on these financial statements based on our audits. We conducted our audits of these statements in accordance with auditing standards generally accepted in the United States of America, which require that we plan and perform the audit to obtain reasonable assurance about whether the financial statements are free of material misstatement. An audit includes examining, on a test basis, evidence supporting the amounts and disclosures in the financial statements, assessing the accounting principles used and significant estimates made by management, and evaluating the overall financial statement presentation. We believe that our audits provide a reasonable basis for our opinion.

The information concerning our executive officers required by this Item is incorporated by reference to the section in Item 1 of this report entitled “Executive Officers of the Registrant” and the section entitled “Section 16(a) Beneficial Ownership Reporting Compliance” in our Proxy Statement. The information concerning our directors required by this Item is incorporated by reference to the section entitled “Proposal One — Election of Directors” in our Proxy Statement.

The sections entitled “Executive Compensation,” “Director Compensation,” and “Employment Contracts and Change of Control Arrangements” in our Proxy Statement are incorporated herein by reference.

Item 12. Security Ownership of Certain Beneficial Owners and Management and Related Stockholder Matters.

The sections entitled “Security Ownership of Certain Beneficial Owners and Management” and “Equity Compensation Plan Information” in our Proxy Statement are incorporated herein by reference.

The sections entitled “Director Compensation” and “Certain Relationships and Related Transactions” in our Proxy Statement are incorporated herein by reference.

Under the supervision and with the participation of our Chief Executive Officer and Chief Financial Officer, we performed an evaluation of the effectiveness of the design and operation of our disclosure controls and procedures within 90 days before the filing date of this report. Based on that evaluation, our Chief Executive Officer and Chief Financial Officer concluded that our disclosure controls and procedures are effective in alerting them to material information required to be included in this report. There have been no significant changes in our internal controls or in other factors that could significantly affect internal controls subsequent to the date we performed this evaluation.

Item 15. Exhibits, Financial Statement Schedules, and Reports on Form 8-K.


	1.	Financial Statements The information required by this item is included in Item 8 of Part II of this report.
	2.	Financial Statement Schedules. All schedules have been omitted as they are either not required, not applicable, or the required information is included in the financial statements or notes thereto.
	3.	Exhibits. The exhibits listed in the Exhibit Index attached to this report are filed or incorporated by reference as part of this annual report.

Pursuant to the requirements of Section 13 or 15(d) of the Securities Exchange Act of 1934, the Registrant has duly caused this report on Form 10-K to be signed on its behalf by the undersigned, thereunto duly authorized.


	ALTERA CORPORATION

	By: /s/ NATHAN SARKISIAN

	Nathan Sarkisian
	Senior Vice President and Chief Financial Officer
	(Principal Financial and Accounting Officer)

Know all persons by these present, that each person whose signature appears below constitutes and appoints Nathan Sarkisian, his or her attorney-in-fact, with the power of substitution, for him or her in any and all capacities, to sign any amendments to this report on Form 10-K, and to file the same, with exhibits thereto and other documents in connection therewith, with the Securities and Exchange Commission, hereby ratifying and confirming all that said attorney-in-fact, or his or her substitute or substitutes, may do or cause to be done by virtue hereof.

Pursuant to the requirements of the Securities Exchange Act of 1934, this report on Form 10-K has been signed below by the following persons on behalf of the Registrant and in the capacities and on the dates indicated:

2. Based on my knowledge, this annual report does not contain any untrue statement of a material fact or omit to state a material fact necessary to make the statements made, in light of the circumstances under which such statements were made, not misleading with respect to the period covered by this annual report;

3. Based on my knowledge, the financial statements, and other financial information included in this annual report, fairly present in all material respects the financial condition, results of operations and cash flows of the registrant as of, and for, the periods presented in this annual report;

4. The registrant’s other certifying officer and I are responsible for establishing and maintaining disclosure controls and procedures (as defined in Exchange Act Rules 13a-14 and 15d-14) for the registrant and have:

a) Designed such disclosure controls and procedures to ensure that material information relating to the registrant, including its consolidated subsidiaries, is made known to us by others within those entities, particularly during the period in which this annual report is being prepared;

b) Evaluated the effectiveness of the registrant’s disclosure controls and procedures as of a date within 90 days prior to the filing date of this annual report (the “Evaluation Date”); and

c) Presented in this annual report our conclusions about the effectiveness of the disclosure controls and procedures based on our evaluation as of the Evaluation Date;

5. The registrant’s other certifying officer and I have disclosed, based on our most recent evaluation, to the registrant’s auditors and the audit committee of registrant’s board of directors (or persons performing the equivalent function):

a) All significant deficiencies in the design or operation of internal controls which could adversely affect the registrant’s ability to record, process, summarize and report financial data and have identified for the registrant’s auditors any material weaknesses in internal controls; and

b) Any fraud, whether or not material, that involves management or other employees who have a significant role in the registrant’s internal controls; and

6. The registrant’s other certifying officer and I have indicated in this annual report whether or not there were significant changes in internal controls or in other factors that could significantly affect internal controls subsequent to the date of our most recent evaluation, including any corrective actions with regard to significant deficiencies and material weaknesses.

b) Evaluated the effectiveness of the registrant’s disclosure controls and procedures as of a date within 90 days prior to the filing date of this annual report (the “Evaluation Date”); and

c) Presented in this annual report our conclusions about the effectiveness of the disclosure controls and procedures based on our evaluation as of the Evaluation Date;

b) Any fraud, whether or not material, that involves management or other employees who have a significant role in the registrant’s internal controls; and


(1)	Incorporated by reference to the Registrant’s report on Form 10-K for the fiscal year ended December 31, 1993.

(2)	Incorporated by reference to the Registrant’s report on Form 10-Q for the quarter ended June 30, 1995.

(3)	Incorporated by reference to the Registrant’s Registration Statement on Form S-8 (File No. 33-61085), as amended, which became effective July 17, 1995.

(4)	Incorporated by reference to the Registrant’s report on Form 10-K for the fiscal year ended December 31, 1995.

(5)	Incorporated by reference to the Registrant’s report on Form 10-K for the fiscal year ended December 31, 1997.

(6)	Incorporated by reference to the Registrant’s Registration Statement on Form S-8 (File No. 333-62917), filed on September 4, 1998.

(7)	Incorporated by reference to the Registrant’s report on Form 10-Q for the quarter ended March 31, 1999.

(8)	Incorporated by reference to the Registrant’s report on Form 10-K for the fiscal year ended December 31, 1999.

(9)	Incorporated by reference to the Registrant’s Registration Statement on Form S-8 (File No. 333-54384), filed on January 26, 2001.


(10)	Incorporated by reference to the Registrant’s report on Form 10-K for the fiscal year ended December 31, 2000.

(11)	Incorporated by reference to the Registrant’s Registration Statement on Form S-8 (File No. 333-56776), filed on March 9, 2001.

(12)	Incorporated by reference to the Registrant’s report on Form 10-Q for the quarter ended March 31, 2001.

(13)	Incorporated by reference to the Registrant’s report on Form 10-K for the fiscal year ended December 31, 2001.

(14)	Incorporated by reference to the Registrant’s report on Form 10-Q for the quarter ended March 31, 2002.

(15)	Incorporated by reference to the Registrant’s Registration Statement on Form S-8 (File No. 333-87382), filed on May 1, 2002.

(16)	Incorporated by reference to the Registrant’s report on Form 10-Q for the quarter ended June 30, 2002.

#	Filed herewith.

*	Confidential treatment has previously been requested for portions of this exhibit.

+	Management contract or compensatory plan or arrangement required to be filed as an exhibit to this report on Form 10-K pursuant to Item 14(c) thereof.


(Mark One)
	x	Annual report pursuant to Section 13 or 15(d) of the Securities Exchange Act of 1934

For the fiscal year ended December 31, 2002

or

	o	Transition report pursuant to Section 13 or 15(d) of the Securities Exchange Act of 1934

For the transition period from ----------- to -----------


Delaware		77-0016691
(State or Other Jurisdiction of Incorporation or Organization)		(I.R.S. Employer Identification No.)

101 Innovation Drive, San Jose, California (Address of Principal Executive Offices)		95134 (Zip Code)


PART I
	Item 1. Business.
	Item 2. Properties.
	Item 3. Legal Proceedings
	Item 4. Submission of Matters to a Vote of Security Holders.
PART II
	Item 5. Market for Registrant’s Common Equity and Related Stockholder Matters.
	Item 6. Selected Financial Data.
	Item 7. Management’s Discussion and Analysis of Financial Condition and Results of Operations.
	Item 7A. Quantitative and Qualitative Disclosures about Market Risk.
	Item 8. Financial Statements and Supplementary Data.
	Item 9. Changes in and Disagreements with Accountants on Accounting and Financial Disclosure.
PART III
	Item 10. Directors and Executive Officers of the Registrant.
	Item 11. Executive Compensation.
	Item 12. Security Ownership of Certain Beneficial Owners and Management and Related Stockholder Matters.
	Item 13. Certain Relationships and Related Transactions.
	Item 14. Controls and Procedures.
	Item 15. Exhibits, Financial Statement Schedules, and Reports on Form 8-K.
EXHIBIT 3.2
EXHIBIT 10.14
EXHIBIT 10.15
EXHIBIT 13.1
EXHIBIT 21.1
EXHIBIT 23.1
EXHIBIT 99.1
EXHIBIT 99.2



	2002				2001

	High		Low		High		Low

First Quarter	$	25.48	$	19.07	$	34.31	$	21.44
Second Quarter		24.46		13.60		30.30		19.69
Third Quarter		14.80		8.93		32.88		15.77
Fourth Quarter		14.98		8.67		26.98		15.38


								Restructuring				Restructuring
						Cash		Liability as of		Cash		Liability as of
		Total		Non-cash		Payments in		December 31,		Payments in		December 31,
(In thousands)		Charges		Charges		2001		2001		2002		2002


Workforce reduction		$	3,834	$	83	$	2,900	$	851	$	722	$	129
Litigation settlement			20,000		-		20,000		-		-		-
Spin-off of Northwest Logic			6,697		6,338		200		159		159		-
Impairment of production and other equipment			8,158		8,158		-		-		-		-
Impairment of investments and intangible assets			5,157		5,157		-		-		-		-
Consolidation of excess facilities and other			3,823		575		2,031		1,217		818		399

	Total	$	47,669	$	20,311	$	25,131	$	2,227	$	1,699	$	528


Name	Age		Position

John P. Daane		39	President and Chief Executive Officer
Denis M. Berlan		53	Executive Vice President and Chief Operating Officer
Erik R. Cleage		42	Senior Vice President, Marketing
John R. Fitzhenry		53	Vice President, Human Resources
Lance M. Lissner		53	Senior Vice President, Business Development
George A. Papa		54	Senior Vice President, Worldwide Sales
Jordan S. Plofsky		42	Senior Vice President, Applications Business Groups
Nathan M. Sarkisian		44	Senior Vice President and Chief Financial Officer
Katherine E. Schuelke		40	Vice President, General Counsel and Secretary



		Years Ended December 31,

		2002		2001		2000


New			27%		13%		4%
Mainstream			39%		46%		47%
Mature and Other			34%		41%		49%

	Total sales		100%		100%		100%


		Year Ended December 31, 2002


Communications		47%
Industrial and Automotive		26%
Computer and Storage		13%
Consumer		14%

	Total sales	100%



	Years Ended December 31,


		2002		2001			2000


Cost of sales			37%		55%			34%
Gross margin			63%		45%			66%
Total research and development expenses			26%		20%			13%
Selling, general, and administrative expenses			23%		26%			15%
Restructuring and other special charges			-		5%			-
Income (loss) from operations			14%		(6%	)		38%
Gain on sale of WaferTech, LLC			-		-			13%
Interest and other income, net			3%		4%			3%
Provision for income taxes			4%		3%			18%
Net income (loss)			13%		(5%	)		36%


Years ending December 31,		(In thousands)


2003		$	5,895
2004			5,101
2005			3,982
2006			2,173
2007			1,568
Thereafter			2,653

	Total	$	21,372


*Item 7A.*	*Quantitative and Qualitative Disclosures about Market Risk.*


	Page
Consolidated Balance Sheets at December 31, 2002 and 2001		28

Consolidated Statements of Operations for the years ended December 31, 2002, 2001, and 2000		29

Consolidated Statements of Cash Flows for the years ended December 31, 2002, 2001, and 2000		30

Consolidated Statements of Stockholders’ Equity for the years ended December 31, 2002, 2001, and 2000		31

Notes to the Consolidated Financial Statements		32

Report of Independent Accountants		46

Financial Statement Schedules
All schedules have been omitted because they are not applicable, not required, or the information required is included in the financial statements or notes thereto.

Supplementary Financial Data		47



		December 31,

(In thousands, except par value amount)			2002			2001


ASSETS
Current assets:
Cash and cash equivalents			$	255,397		$	145,048
Short-term investments				687,262			660,643

	Total cash, cash equivalents, and short-term investments			942,659			805,691
Accounts receivable, less allowances for doubtful accounts of $5,066 and $5,965, respectively				57,111			33,931
Inventories				39,089			77,611
Deferred income taxes				105,289			125,672
Other current assets				32,028			86,443

	Total current assets			1,176,176			1,129,348
Property and equipment, net				183,999			217,282
Investments and other assets, net				11,562			14,797

			$	1,371,737		$	1,361,427


LIABILITIES AND STOCKHOLDERS’ EQUITY
Current liabilities:
Accounts payable			$	22,759		$	17,573
Accrued liabilities				23,109			26,644
Accrued compensation				34,833			22,102
Deferred income on sales to distributors				144,307			147,745
Income taxes payable				15,493			32,863

	Total current liabilities			240,501			246,927

Commitments and contingencies (See Notes 9 and 13)
Stockholders’ equity:
Common stock;
	$.001 par value; 1,000,000 shares authorized; 383,504 and 386,301 shares issued and outstanding, respectively			384			386
Capital in excess of par value				403,318			394,748
Retained earnings				740,824			740,655
Deferred stock-based compensation				(14,689	)		(24,961	)
Accumulated other comprehensive income				1,399			3,672

	Total stockholders’ equity			1,131,236			1,114,500

			$	1,371,737		$	1,361,427



		Years Ended December 31,


(In thousands, except per share amounts)		2002		2001			2000


Net sales		$	711,684	$	839,376		$	1,376,815
Cost of sales			263,067		458,699			466,994

Gross margin			448,617		380,677			909,821
Research and development expenses			182,766		170,869			172,373
Selling, general, and administrative expenses			168,484		215,318			209,979
Restructuring and other special charges			-		47,669			-
Acquired in-process research and development expense			-		-			6,305

Income (loss) from operations			97,367		(53,179	)		521,164
Gain on sale of WaferTech, LLC			-		-			178,105
Interest and other income, net			25,961		40,176			46,145

Income (loss) before income taxes and equity investment			123,328		(13,003	)		745,414
Provision for income taxes			32,065		26,779			247,107
Equity in loss of WaferTech, LLC			-		-			1,400

	Net income (loss)	$	91,263	$	(39,782	)	$	496,907

Net income (loss) per share:
	Basic	$	0.24	$	(0.10	)	$	1.25
	Diluted	$	0.23	$	(0.10	)	$	1.19
Shares used in computing per share amounts:
	Basic		383,619		386,097			396,849
	Diluted		391,708		386,097			416,629


					Common
					Stock and									Accumulated
		Number of			Capital In						Deferred			Other			Total
		Common			Excess of			Retained			Stock-based			Comprehensive			Stockholders’
(In thousands)		Shares			Par Value			Earnings			Compensation			Income (Loss)			Equity


Balance, December 31, 1999			397,260		$	326,638		$	791,435		$	-		$	-		$	1,118,073
Components of comprehensive income:
	Net income		-			-			496,907			-			-			496,907
	Change in unrealized gains/(losses) on available-for-sale investments, net of tax benefit of $472		-			-			-			-			(738	)		(738	)

	Total comprehensive income		-			-			-			-			-			496,169
Tax benefit resulting from employee stock transactions			-			113,859			-			-			-			113,859
Issuance of common stock			8,201			39,871			-			-			-			39,871
Issuance of common stock and options for acquisitions			934			59,928			-			(41,259	)		-			18,669
Deferred stock-based compensation resulting from issuance of restricted stock			-			17,606			-			(17,606	)		-			-
Amortization of deferred stock-based compensation			-			-			-			9,764			-			9,764
Repurchase of common stock			(17,130	)		(175,307	)		(380,146	)		-			-			(555,453	)
Proceeds from sales of put warrants			-			6,978			-			-			-			6,978

Balance, December 31, 2000			389,265			389,573			908,196			(49,101	)		(738	)		1,247,930
Components of comprehensive loss:
	Net loss		-			-			(39,782	)		-			-			(39,782	)
	Change in unrealized gains/(losses) on available-for-sale investments, net of tax expense of $2,695		-			-			-			-			4,410			4,410

	Total comprehensive loss		-			-			-			-			-			(35,372	)
Tax benefit resulting from employee stock transactions			-			27,882			-			-			-			27,882
Issuance of common stock			4,256			34,311			-			-			-			34,311
Deferred stock-based compensation resulting from issuance of restricted stock			-			283			-			(283	)		-			-
Amortization of deferred stock-based compensation			-			-			-			18,569			-			18,569
Reversal of deferred stock-based compensation due to forfeitures			-			(1,440	)		-			1,440			-			-
Write-off of deferred stock-based compensation related to restructuring			-			-			-			4,414			-			4,414
Repurchase of common stock			(7,220	)		(55,475	)		(127,759	)		-			-			(183,234	)

Balance, December 31, 2001			386,301			395,134			740,655			(24,961	)		3,672			1,114,500
Components of comprehensive income:
	Net income		-			-			91,263			-			-			91,263
	Change in unrealized gains/(losses) on available-for-sale investments, net of tax benefit of $1,327		-			-			-			-			(2,273	)		(2,273	)

	Total comprehensive income		-			-			-			-			-			88,990
Tax benefit resulting from employee stock transactions			-			11,491			-			-			-			11,491
Issuance of common stock			6,103			44,354			-			-			-			44,354
Deferred stock-based compensation resulting from issuance of restricted stock			-			1,105			-			(1,105	)		-			-
Amortization of deferred stock-based compensation			-			-			-			11,377			-			11,377
Repurchase of common stock			(8,900	)		(48,382	)		(91,094	)		-			-			(139,476	)

Balance, December 31, 2002			383,504		$	403,702		$	740,824		$	(14,689	)	$	1,399		$	1,131,236



		2002									2001

				Gross		Gross							Gross		Gross
				Unrealized		Unrealized			Fair				Unrealized		Unrealized			Fair
(In thousands)		Cost		Gains		Losses			Value		Cost		Gains		Losses			Value


Money market funds		$	141,218	$	-	$	-		$	141,218	$	159	$	-	$	-		$	159
Municipal bonds			371,076		1,773		(28	)		372,821		363,130		2,106		(124	)		365,112
U.S. government and agency obligations			168,648		353		(5	)		168,996		56,451		740		(87	)		57,104
Corporate bonds			54,730		186		(1	)		54,915		179,326		3,238		-			182,564
Other debt securities			192,651		28		(11	)		192,668		133,329		51		(29	)		133,351

	Total	$	928,323	$	2,340	$	(45	)	$	930,618	$	732,395	$	6,135	$	(240	)	$	738,290

Included in:
	Cash and cash equivalents								$	243,356								$	77,647
	Short-term investments									687,262									660,643

	Total								$	930,618								$	738,290



				Options Outstanding


	Shares			Number			Weighted
	Available for			of			Average
(In thousands, except price per share amounts)	Options			Shares			Exercise Price


December 31, 1999		5,512			46,778		$	9.06
Grants		(13,406	)		13,406			35.92
Exercises		-			(7,386	)		4.13
Forfeitures		2,117			(2,117	)		17.74
Additional shares reserved		8,000			-			-

December 31, 2000		2,223			50,681		$	16.52
Grants		(12,119	)		12,119			25.71
Exercises		-			(3,669	)		5.98
Forfeitures		3,072			(3,089	)		29.55
Additional shares reserved		15,000			-			-

December 31, 2001		8,176			56,042			18.48
Grants		(12,518	)		12,518			14.48
Exercises		-			(5,166	)		6.40
Forfeitures		3,264			(3,264	)		26.98
Additional shares reserved		9,000			-			-

December 31, 2002		7,922			60,130		$	18.22



	Options Outstanding						Options Exercisable

			Weighted
	Number		Average		Weighted		Number		Weighted
	Outstanding		Remaining		Average		Exercisable		Average
Range of	at 12/31/02		Contractual		Exercise		at 12/31/02		Exercise
Exercise Prices	(In thousands)		Life (Years)		Price		(In thousands)		Price


$ 0.01 – $ 7.64		10,482		2.94	$	4.61		10,358	$	4.63
$ 7.66 – $12.72		11,867		6.57		9.96		7,289		8.45
$12.93 – $20.88		12,820		8.10		15.55		4,714		16.10
$21.03 – $23.94		10,925		8.26		22.75		2,404		23.10
$23.99 – $46.22		12,816		8.00		32.37		2,252		31.44
$46.31 – $63.44		1,220		7.58		54.31		708		54.26

		60,130		6.90	$	18.22		27,725	$	12.63



	Stock Options									Employee Stock Purchase Plan

Years Ended December 31,	2002			2001			2000			2002			2001			2000


Expected life		3.3			4.5			4.1			0.5			0.5			0.5
Expected stock price volatility		71.7	%		63.8	%		57.3	%		82.1	%		91.5	%		84.6	%
Risk-free interest rate		2.9	%		4.4	%		6.2	%		1.8	%		3.9	%		5.9	%


		2002		2001

Due in one year or less		$	318,277	$	192,631
Due after one year through two years			612,341		545,659

	Total	$	930,618	$	738,290


				Amortization
(In thousands)		Amount		Period


Deferred stock-based compensation			$41,259		2 to 4 years
Market ready technology			21,446		3 to 6 years
In-process research and development			6,305		-
Other intangible assets			2,481		3 years
Tangible assets and working capital			590		-

	Total		$72,081



		December 31,

(In thousands)			2002		2001


United States			$	150,639	$	167,506
Malaysia				22,954		25,755
Other				21,968		38,818

	Total		$	195,561	$	232,079


(In thousands, except per share amounts)	First Quarter		Second Quarter			Third Quarter		Fourth Quarter


2002

Net sales		$171,957		$178,936			$180,144		$180,647
Gross margin		103,374		108,771			114,955		121,517
Net income		19,015		21,729			23,396		27,123
Basic net income per share		0.05		0.06			0.06		0.07
Diluted net income per share		0.05		0.06			0.06		0.07

2001

Net sales		$287,438		$215,260			$174,153		$162,525
Gross margin		188,243		22,542			109,632		60,260
Net income (loss)		62,992		(89,202	)		20,850		(34,422	)
Basic net income (loss) per share		0.16		(0.23	)		0.05		(0.09	)
Diluted net income (loss) per share		0.16		(0.23	)		0.05		(0.09	)


*Item 9.*	*Changes in and Disagreements with Accountants on Accounting and Financial Disclosure.*



	Capacity in Which Signed	Date
Signature



/s/ RODNEY SMITH Rodney Smith	Chairman of the Board of Directors	March 10, 2003

/s/ JOHN P. DAANE John P. Daane	President, Chief Executive Officer, and Director (Principal Executive Officer)	March 10, 2003

/s/ NATHAN SARKISIAN Nathan Sarkisian	Senior Vice President and Chief Financial Officer (Principal Financial and Accounting Officer)	March 10, 2003

/s/ CHARLES M. CLOUGH Charles M. Clough	Director	March 10, 2003

/s/ ROBERT J. FINOCCHIO, JR. Robert J. Finocchio, Jr.	Director	March 10, 2003

/s/ PAUL NEWHAGEN Paul Newhagen	Director	March 10, 2003

/s/ ROBERT W. REED Robert W. Reed	Director and Vice Chairman of the Board of Directors	March 10, 2003


Exhibit Number		Exhibit

3.1		Amended and Restated Certificate of Incorporation, as currently in effect.(12)
#3.2		By-laws of the Registrant, as currently in effect.
4.1		Specimen copy of certificate for shares of common stock of the Registrant.(5)
10.1+		Altera Corporation 1987 Stock Option Plan, and forms of Incentive and Nonstatutory Stock Option Agreements, as amended March 22, 1995 and as restated effective May 10, 1995.(3)
10.2+		Altera Corporation 1987 Employee Stock Purchase Plan, as amended and restated April, 2002, and form of Subscription Agreement.(16)
10.3		Form of Indemnification Agreement entered into with each of the Registrant’s officers and directors.(5)
10.4+		Altera Corporation 1988 Director Stock Option Plan and form of Outside Director Nonstatutory Stock Option Agreement restated effective May 7, 1997.(8)
10.5		LSI Products Supply Agreement with Sharp Corporation, dated October 1, 1993.(1)
10.6		Letter Agreement, dated August 20, 1996, by and between the Registrant and Sharp Corporation, amending the LSI Product Supply Agreement, dated October 1, 1993.(8)
10.7		Letter Agreement, dated May 22, 1997, by and between the Registrant and Sharp Corporation, amending the LSI Product Supply Agreement, dated October 1, 1993.(8)
10.8		Letter Agreement, dated May 22, 1998, by and between the Registrant and Sharp Corporation, amending the LSI Product Supply Agreement, dated October 1, 1993.(8)
10.9+		Altera Corporation Nonqualified Deferred Compensation Plan, as amended and restated effective January 1, 2002.(14)
10.10+		Form of Deferred Compensation Agreement.(14)
10.11*		Wafer Supply Agreement dated June 26, 1995 between the Registrant and Taiwan Semiconductor Manufacturing Co., Ltd.(2)
10.12*		Amendment No. 1 dated as of October 1, 1995 to Wafer Supply Agreement dated as of June 26, 1995 by and between the Registrant and Taiwan Semiconductor Manufacturing Co., Ltd. and to Option Agreement 1 dated as of June 26, 1995 between the Registrant and Taiwan Semiconductor Manufacturing Co., Ltd.(4)
10.13		Amendment of Wafer Supply Agreement dated June 1, 1997 by and between the Registrant and Taiwan Semiconductor Manufacturing Co., Ltd.(8)
#10.14+		Altera Corporation 1996 Stock Option Plan, as amended effective as of January 1, 2003.
#10.15+		Form of Stock Option Agreement under 1996 Stock Option Plan.
10.16+		1998 Director Stock Option Plan, as amended effective October 2001.(13)
10.17+		Form of Stock Option Agreement under 1998 Director Stock Option Plan.(12)
10.18		Product Distribution Agreement with Arrow Electronics Incorporated, effective January 26, 1999.(7)
10.19+		Stock Option Agreements between the Registrant and Paul Newhagen.(6)
10.20+		Restricted Stock Purchase Agreement between the Registrant and John Daane.(9)
10.21+		Severance Agreement, dated as of November 30, 2000, by and between John Daane and the Registrant.(10)
10.22+		Change in Control Severance Agreement, dated as of November 30, 2000, by and between John Daane and the Registrant.(10)
10.23+		Letter Agreement, dated July 27, 2001, by and between the Registrant and John Daane.(13)
10.24+		Restricted Stock Purchase Agreement between the Registrant and Jordan Plofsky.(11)
10.25+		Form of Restricted Stock Purchase Agreement between the Registrant and George Papa.(15)
#11.1		Computation of Earnings per Share (included on page 35).
#13.1		Selected Consolidated Financial Data from the Annual Report to Stockholders for the fiscal year ended December 31, 2002.
#21.1		Subsidiaries of the Registrant.
#23.1		Consent of PricewaterhouseCoopers LLP.
#24.1		Power of Attorney (included on page 49).


Exhibit Number		Exhibit

#99.1		Certification of Chief Executive Officer pursuant to 18 U.S.C. Section 1350, as adopted pursuant to Section 906 of the Sarbanes-Oxley Act of 2002.
#99.2		Certification of Chief Financial Officer pursuant to 18 U.S.C. Section 1350, as adopted pursuant to Section 906 of the Sarbanes-Oxley Act of 2002.