SYNOPSYS INC - 10-K Annual Report

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UNITED STATES SECURITIES AND EXCHANGE COMMISSION
WASHINGTON, D.C. 20549

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FORM 10-K

[X] ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(d)
OF THE SECURITIES EXCHANGE ACT OF 1934

FOR THE YEAR ENDED OCTOBER 31, 2001

OR

[ ] TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(d)
OF THE SECURITIES EXCHANGE ACT OF 1934

COMMISSION FILE NUMBER 0-45138

SYNOPSYS, INC.
(Exact name of registrant as specified in its charter)

DELAWARE 56-1546236
(State or other jurisdiction of (I.R.S. Employer
incorporation or organization) Identification No.)

700 EAST MIDDLEFIELD ROAD, MOUNTAIN VIEW, CALIFORNIA 94043
(Address of principal executive offices)

(650) 584-5000
(Registrant's telephone number, including area code)

SECURITIES REGISTERED PURSUANT TO SECTION 12(b) OF THE ACT: NONE

SECURITIES REGISTERED PURSUANT TO SECTION 12(g) OF THE ACT:
COMMON STOCK, $0.01 PAR VALUE

PREFERRED SHARE PURCHASE RIGHTS

Indicate by check mark whether the registrant (1) has filed all reports
required to be filed by Section 13 or 15(d) of the Securities Exchange Act of
1934 during the preceding 12 months (or for such shorter period that the
registrant was required to file such reports), and (2) has been subject to such
filing requirements for the past 90 days. [X] Yes No [ ]

Indicate by check mark if disclosure of delinquent filers pursuant to Item
405 of Regulation S-K is not contained herein, and will not be contained, to the
best of registrant's knowledge, in definitive proxy or information statements
incorporated by reference in Part III of this Form 10-K or any amendment to this
Form 10-K. [ ]

The aggregate market value of voting stock held by non-affiliates of the
registrant as of January 5, 2002, was approximately $2,522,354,670.

On January 5, 2002 approximately 60,543,491 shares of the registrant's
Common Stock, $0.01 par value, were outstanding.

DOCUMENTS INCORPORATED BY REFERENCE

Portions of the registrant's Notice of 2002 Annual Meeting and/Joint Proxy
Statement/Prospectus are incorporated by reference into Part III hereof.
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SYNOPSYS, INC.

ANNUAL REPORT ON FORM 10-K
YEAR ENDED OCTOBER 31, 2001

TABLE OF CONTENTS

1

PART I

This Form 10-K, including "Item 1. Business," includes forward-looking
statements within the meaning of Section 21E of the Securities Exchange Act of
1934. These statements include, but are not limited to, statements concerning:
the Company's business strategy; the Company's plans to expand its consulting
services business; the Company's expansion into the market for physical design
tools; the Company's intention regarding its system level design and
verification tools; the Company's intention regarding design reuse tools and
techniques; the Company's expectations regarding research and development, sales
and marketing, and general and administrative expenses; the Company's efforts to
enhance its existing products and develop or acquire new products; and the
Company's requirements for working capital. The Company's actual results could
differ materially from those projected in the forward-looking statements as a
result of risks and uncertainties that include, but are not limited to, those
discussed under the caption "Factors That May Affect Future Results" under
"Management's Discussion and Analysis of Financial Condition and Results of
Operations" included in Part II, Item 7 hereto, as well as factors discussed
elsewhere in this Form 10-K.

ITEM 1. BUSINESS

PENDING ACQUISITIONS

On July 2, 2001, the Company entered into an Agreement and Plan of Merger
with IKOS Systems, Inc. (IKOS), which manufactures hardware-assisted
verification systems. On December 3, 2001 the Company entered into an Agreement
and Plan of Merger with Avant! Corporation, which makes EDA software principally
serving the physical design portion of the market. The proposed mergers are
described under Item 7 below.

Except in limited respects, this report on Form 10-K discusses Synopsys'
business as of the end of fiscal 2001 and before giving effect to either
proposed merger.

INTRODUCTION

Synopsys, Inc. (Synopsys or the Company) is a leading supplier of
electronic design automation (EDA) software to the global electronics industry.
The Company's products are used by designers of integrated circuits (ICs),
including system-on-a-chip ICs, and the electronic products (such as computers,
cell phones, and internet routers) that use such ICs to automate significant
portions of their chip design process. ICs are distinguished by the speed at
which they run, their area, the amount of power they consume and the cost of
production. The Company's products offer its customers the opportunity to design
ICs that are optimized for speed, area, power consumption and production cost,
while reducing overall design time. The Company also provides consulting
services to assist customers with their IC designs, as well as training and
support services. Synopsys was incorporated in Delaware in 1987.

THE ROLE OF EDA IN THE ELECTRONICS INDUSTRY

Over the past three decades, technology advances in the semiconductor
industry have dramatically increased the size, speed and capacity of ICs:

- The number of transistors that can be placed on a chip has doubled
roughly every 18 months. A state-of-the-art IC may hold over 40 million
transistors. This is made possible in large part because the width of the
features on the chip is steadily shrinking. Mainstream IC designs today
are produced at a 0.18 micron process, with advanced chips being produced
at a 0.13 micron process. Over the next several years, the bulk of
production will shift to 0.13 micron or below.

- The speed at which chips operate has steadily increased. Microprocessors
operating at 2 gigahertz, a speed that was unheard of a few years ago,
are available today.

- Chips are also becoming more economical in their power consumption, which
is necessary to drive more and more powerful handheld devices.

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- Increasingly, functions that formerly were performed by multiple ICs
attached to a printed circuit board are being combined in a single chip,
referred to as a system-on-a-chip.

Combined, these changes have fostered the development of computers,
internet routers, wireless communications networks, hand-held personal digital
assistants, and many other goods and services with tremendous capabilities at
relatively low cost.

Competition and continuing innovation have shortened the life cycle of
electronic products, so time-to-market is crucial to the success of a product.
Time-to-market can in large part be determined by the time it takes to design
the chip that will run such product. EDA products play a critical role in
reducing time-to-market for new products by providing IC designers with tools
and techniques to (a) reduce the time and manual effort required to design,
analyze and verify individual ICs, (b) improve the performance and density of
complex IC designs and (c) enhance the reliability of the IC design and
manufacturing process.

THE DESIGN PROCESS

In simplified form, the design of an integrated circuit consists of five
basic steps:

System Design. First, a designer describes the functions that the chip is
to perform in a specialized high-level computer language. During this phase,
designers perform high level architectural design tradeoffs, to determine, for
example, which algorithms to use to implement the design, and what portions of
the design to implement in hardware and what portions in software. At the
completion of this phase, the designer produces a "register transfer level" or
"RTL" description of the chip. Most of this process is completed manually,
although there is a small but growing market for products that help automate
design and verification at the system level.

Logic Synthesis. After the designer is satisfied with the RTL code, a
logic synthesis program converts the RTL code into a logical diagram of the
chip. Related programs insert the circuitry that will be required to test the
chip after manufacture. A "gate level" (so called because it describes the
various logic blocks, or gates, required to implement the chip) data file, or
"net list", is produced. In a growing number of designs, the logic synthesis
phase is performed together with a portion of physical design. This combined
process, known as "physical synthesis", produces a file containing "placed
gates", which describes the logic blocks and includes information about where
they will be physically located, or "placed", on a chip. See discussion below
under "Current Issues Facing IC Designers". In a growing number of
system-on-a-chip ICs, in which multiple functions previously captured on
multiple chips are combined in a single chip, designers are increasingly
performing "chip planning", either before or in conjunction with logic
synthesis. In chip planning, the designer determines the location of the
functional "blocks" that will be captured on the system-on-a-chip and plans the
principal wire connections between the blocks. Logic synthesis is then
performed, more or less independently, on each block, before the blocks are
"stitched" back together.

High Level Verification. At this stage the designer uses simulation and
related programs to verify that the design, and for the individual blocks,
successfully perform the functions that the designer intended, by feeding an
exhaustive array of potential inputs into a specialized program, "simulating"
the functioning of the chip as designed, and checking to confirm that the
outputs match what was expected. Other techniques which use advanced
mathematical calculations rather than simulation are also used. The designer
also uses a timing analysis program to confirm that the chip as designed will
operate at the speed the designer intended.

Physical Design. If the designer is satisfied with the results of high
level verification, the transistors, and all of the wires connecting each one of
them, are mapped out in a series of transformations that gradually gets more and
more detailed. First, the location on the chip die of each block of the chip is
finalized, and the location of each transistor within each block is
determined -- a process known as "placement" -- then all of the connections
between the transistors are determined -- a process known as "routing". The
result is one or more data files that can be read by physical verification
programs (see below) or by the equipment used to manufacture the chip.

Physical Verification. Before sending the design data file to a chip
manufacturer for fabrication, a further verification step is undertaken. The
designer must confirm that the chip as placed and routed will
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operate at the speed anticipated during the logic design phase. The designer
also must check for unintended electrical effects that may arise as a
consequence of placing certain portions of the chip, or routing certain of its
"wires", too close together or in a bad position. Finally, the designer must
verify that the final design complies with all of the design rules set forth by
the party that will manufacture the chip.

The foregoing discussion has been greatly simplified. In the actual design
of a chip each of these steps has a number of different elements. The steps, or
the different elements within the steps, may be undertaken in a different order
or repeated one to multiple times. In any event, if at any stage of the process
the chip does not perform as intended, then the designer must go back one or
more steps to either redesign the RTL, redesign the logic, re-run the
verification or redo the physical design of the chip. Each iteration takes time,
and the more time the process takes, the more difficult it will be for the
designer to meet his or her time-to-market goals.

CURRENT ISSUES FACING IC DESIGNERS

As chip technology continues to advance, and particularly as the
state-of-the-art in chip design moves to 0.18 micron and below, Synopsys'
customers are facing a number of difficult design challenges:

Timing Closure. Ensuring that a chip will run at the desired speed becomes
substantially more difficult as transistor sizes move to 0.18 micron and below.
At larger transistor feature sizes, IC designers could use standard estimates of
chip timing during the logic design phase, and be confident that the timing
characteristics would be preserved through the physical design phase. At 0.18
micron and below, these estimates become more and more unreliable. To address
this problem, customers will increasingly need products (referred to in the EDA
industry as "physical synthesis" products) that integrate logic design and
physical design. Synopsys' physical synthesis solution takes physical design
information into account during logic design, and produces a file containing
"placed gates". Physical synthesis provides more accurate timing estimates at
the logic design phase, greatly improving the correlation between original
timing estimates after logic design and timing results after physical design.

Signal Integrity Closure. Signal integrity refers to a variety of
electrical effects that can cause circuits to behave in undesirable ways. The
electrical characteristics of ICs of 0.13 micron and below cause previously
insignificant effects to become problematic. These effects include cross-talk,
voltage drop, and electro-migration. Cross-talk, in particular, is becoming a
major problem for advanced designs today. In order to address signal integrity
problems designers need products that help them analyze, prevent and repair
errors caused by signal integrity issues. Synopsys has added cross-talk analysis
to its PrimeTime timing analysis product to aid designers in detecting
cross-talk-induced timing violations. Synopsys' physical synthesis tools include
analysis, prevention and repair features to achieve signal integrity closure
more quickly and reliably.

Verification. Verification is the process of ensuring, at various stages
of the design process, that a chip will perform as intended. As the number of
transistors on a chip grows, the verification problem grows geometrically. In
fact, with today's chips, verification often takes up the single largest
proportion of the overall design process. Verification products must offer
customers a combination of speed, accuracy and the ability to focus on the
portions of the chip most likely to cause problems.

Designer Productivity. Historically, finding, hiring and retaining
qualified design engineers has been one of the most difficult problems that our
customers face. Without enough designers it is difficult for a company to meet
ambitious development schedules, and to get its products to market in a timely
manner. Although hiring qualified designers has become less difficult in the
current economic environment, the increase in IC complexity and time to market
pressures have resulted in a continuing emphasis on designer productivity. For
EDA companies, this creates opportunities both in providing full-featured,
integrated design flows, that reduce the number of iterations required during
the design process, and in offering pre-designed, pre-verified design "building
blocks" that can be re-used in multiple designs.

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SYNOPSYS OVERVIEW

Synopsys provides products and services that help customers meet the
challenges of designing leading edge ICs and the products that incorporate them.

Synopsys offers a comprehensive suite of logic synthesis and related
products that allow an IC designer to describe chip behavior in a high-level
language and convert that description into a map of the chip's logic blocks,
including circuits that facilitate testing of the chip before it is fabricated.
Synopsys has been working on extending its design tools product line to include
several products that integrate logic design and physical design.

Synopsys' high level and physical verification products are used by IC
designers in several stages of the IC design process to ensure that the
resulting IC performs the function that the designer intended. Synopsys'
simulation products permit IC designers to simulate their designs and to explore
tradeoffs between incorporating functionality in hardware or software. Synopsys
also offers a suite of products that help designers focus on the most
problematic portions of their chips. And to help customers analyze other aspects
of chip performance, Synopsys offers an extensive line of software tools to
analyze power, timing and reliability concerns in an IC design at the RTL, gate
and transistor levels.

Synopsys provides the broadest array of reusable design building blocks of
any company in the EDA and intellectual property (IP) industry. The Company's IP
products also include software and hardware models, which are used to test an IC
design within the context of the system in which the IC will eventually be used.

Synopsys also offers a full range of professional services to help
customers improve their internal design methodologies, as well as design
services ranging from specialized assistance to turnkey design.

Synopsys markets its products on a worldwide basis and offers comprehensive
customer service, education, consulting, and support as integral components of
its product offerings. Products are marketed primarily through its direct sales
force. Synopsys has licensed its products to most of the world's leading
semiconductor, computer, communications and electronics companies.

STRATEGY

Synopsys' strategy is to develop and offer to its customers a broad array
of tools and services required to enable design of complex ICs, especially
system-on-a-chip ICs. The Company is seeking to build and enhance products that
help customers address the most pressing problems of IC design at 0.18 micron
and below: timing closure, signal integrity and closure, verification, and
designer productivity. First, building from its historical base of strength in
high level design, Synopsys plans to help customers address the timing closure
problem by continuing its expansion into the market for physical synthesis
products -- products that integrate logical and physical design. Second,
Synopsys will seek to address signal integrity issues by developing products
that help designers analyze, prevent and fix signal integrity problems at
different levels of the design process. Third, Synopsys will seek to help
customers address their verification needs by building a comprehensive offering
of verification products around its current position in simulation, test and
timing analysis. Fourth, Synopsys intends to help customers address the designer
shortage by expanding its inventory of reusable design building blocks, which
will allow customers to focus their own design teams on areas of competitive
differentiation, and by offering professional services to supplement customers'
own design teams.

PRODUCTS

Synopsys products and services are focused on the principal needs of IP and
systems designers, and can be divided into five categories -- IC Implementation,
Verification and Test, IP and Systems Level Design, Transistor Level Design and
Professional Services. The products included in these categories are discussed
below. Financial information regarding these products is included under Item
7 -- Management's Discussion and Analysis of Financial Condition and Results of
Operation -- "Results of Operation -- Revenue -- Product Groups".

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IC IMPLEMENTATION PRODUCTS

Synopsys' IC Implementation products include the Company's basic logic
synthesis and related products, and the Company's new physical synthesis
products.

During fiscal 2001, IC Implementation products accounted for 40% of the
Company's revenues.

Logic synthesis is the process by which a high-level description of desired
chip functions is mapped into a connected collection of logic gates and other
circuit elements that perform the desired functions. Design Compiler(TM) is the
market-leading logic synthesis tool and is used by a broad range of companies
engaged in the design of ICs to optimize their designs for performance and area.
Design Compiler was introduced in 1988 and has been updated regularly since
then. The Company's Design Compiler product family also includes Power Compiler
and Module Compiler. Power Compiler provides "push-button" power optimization
and early analysis for the design of low power circuits, which are key for the
design of hand-held devices. Module Compiler is used in the design of complex
datapaths.

In fiscal 2001, Synopsys released Design Compiler 2001 as the latest
generation in the Design Compiler family. Design Compiler 2001 features
significant enhancements, including improved optimization algorithms, run-times
and capacity. Over time, Synopsys expects that a significant portion of the
existing Design Compiler license base will be upgraded to Physical Compiler
(discussed below), although Design Compiler will continue to be an important
element in designers overall suite of design tools, especially for performing
logic synthesis on non-timing-critical portions of a design.

Physical synthesis unites logic synthesis, placement and, in the future,
routing and links them together with common timing. When used together, the
physical synthesis suite of products provides customers with an integrated
design flow from register transfer level through placement and routing, and
addresses the critical timing problems encountered in designing advanced ICs and
systems-on-a-chip.

Physical Compiler, released by the Company in 2000, unifies synthesis and
placement in a single product in order to greatly improve designers' ability to
achieve timing closure. As of October 2001, Physical Compiler had been licensed
to over 120 customers and more than 350 IC designs had been completed using the
product. During fiscal 2001, the Company received approximately $100 million in
orders for Physical Compiler.

The physical synthesis suite of products also includes Chip Architect,
FlexRoute, ClockTree Compiler, and Route Compiler. Chip Architect is a
hierarchical design planner, which takes into account physical phenomena and is
used at various stages of the system-on-a-chip design process to perform
chip-level estimation, floor-planning, timing analysis and placement. FlexRoute
is a high-capacity, object-based, top-level router, which is used to route the
longest, most-difficult-to-route connections between functional blocks on a
system-on-a-chip. During fiscal 2001, the Company announced Route Compiler and
Clock Tree Compiler and began working with four target customers to enhance the
product for broader release. Commercial release of these products is expected in
the first half of calendar 2002. ClockTree Compiler is a clock tree synthesis
option to Physical Compiler that integrates design and clock tree synthesis into
one tool. Route Compiler is a standard cell router integrated into Physical
Compiler that completes detailed routing.

The Company's IC Implementation products also include logic synthesis
products for field programmable gate arrays (FPGAs) and complex programmable
logic devices (CPLDs). With the advent of high-density chips (.25 micron and
below), FPGAs have become fast and large enough to handle a substantial fraction
of projects that previously required mask-programmed application specific
integrated circuits (ASICs). Furthermore, FPGAs' unique ability to deliver very
quick time-to-market make them attractive in today's business environment. An
enhanced version of FPGA Compiler II(TM) offering enhanced synthesis for Xilinx
and Altera FPGA devices was released in fiscal 2001.

VERIFICATION AND TEST PRODUCTS

The Company's Verification and Test products consist of a group of tools,
including simulation, test automation and timing verification products, to
enable IC designers to quickly and reliably verify the behavior

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of a design before it is committed to the expensive and time-consuming process
of IC fabrication, and to assist in the testing of the chip after manufacturing.

During fiscal 2001, Verification and Test products accounted for 29% of the
Company's revenues.

Simulation and related products. Simulation software "exercises" an IC
design by running it through a series of tests and comparing the actual outputs
from the design with the expected output. As such, simulation products are the
key products for functional verification. The goal of simulation is to make sure
that the functionality of the design meets the original specifications of the
chip. Synopsys offers two products for high-level simulation: VCS(TM), for
designs written in Verilog (one of the two principal languages) and
Scirocco(TM), for designs written in VHDL (the other principal language).
Simulation products are distinguished principally by their runtime and
capacity -- i.e., how fast they can fully simulate a proposed design and how
large a design they can handle. The Company is focused on providing the
industry's fastest and highest-capacity simulation technology and believes that
both VCS and Scirocco are industry leaders in performance and capacity. VCS is
supported by all major semiconductor manufacturers and many third-party EDA
software providers.

In addition to focusing on building the fastest simulator, Synopsys is
focused on developing a suite of products that help simulation products work
"smarter". The Company estimates that more time is spent in writing verification
"testbenches" than in creating the design description. Testbenches, which create
stimuli for chips and check the results, are used in conjunction with simulation
tools to verify that a design functions as expected. Synopsys provides software
that helps generate and manage testbenches as well as evaluate the effectiveness
of the simulation process. VERA(R) is a tool that automates the design of
testbenches, thereby offering the IC designer significant reductions in overall
design and verification time. VERA provides a high-level language designed
specifically for verifying complex designs. VERA is integrated with the
Company's other simulation products.

Test Automation. In order to meet today's stringent quality requirements,
chips must pass through rigorous testing after manufacturing. Synopsys'
design-for-test (DFT) tools offer a complete DFT solution. Synopsys' DFT
Compiler, the industry-standard 1-pass test synthesis product, inserts all
functional and test logic required to enable efficient, high-coverage testing of
the chip after manufacturing, while complying with the customer's design rules
and constraints (timing, area, power, etc.). DFT Compiler works seamlessly with
Design Compiler and Physical Compiler, with the added benefit, in the case of
Physical Compiler, of placement-driven optimization of test logic. DFT Compiler
was awarded the 2001 "Best in Test" Award from Test & Measurement World, an
industry journal. The award is presented annually to honor important and
innovative products in the electronics test and measurement industry.

Automatic test pattern generation (ATPG) is the other component of
Synopsys' complete DFT solution. TetraMAX(TM) ATPG, the Company's ATPG product
is optimized for ease-of-use, capacity, speed, coverage and vector compaction.
TetraMAX ATPG works in concert with DFT Compiler to enable total automation of
the DFT flow. Synopsys test methodology also includes software to facilitate the
failure diagnosis of chips after manufacturing test, expediting the
time-consuming and expensive post-fabrication activities required to determine
the cause of manufacturing defects.

Static Timing Analysis. Synopsys provides a complete tool suite to help
designers perform static timing analysis at the gate and transistor levels and
analyze signal integrity issues such as cross-talk. Synopsys' gate level
analysis tool is called PrimeTime(R). PrimeTime is a full-chip, gate-level
static timing analysis tool targeted for complex multimillion gate designs,
which is used by designers to verify, at various stages of the design process,
the speed at which a design will operate when it is fabricated. PrimeTime's
analysis of a design's speed is accepted as a "sign off" tool by virtually all
major semiconductor manufacturers, which means that they accept its analysis as
determinative. (Synopsys transistor-level timing analysis products are described
below under "Transistor Level Design"). In fiscal 2001, Synopsys extended
PrimeTime's capabilities with the introduction of PrimeTime-SI, which analyzes
the effect of cross-talk on timing, an increasingly important issue at chip
geometries below 0.18 micron.

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Formal Verification -- Equivalence Checking. Formal verification is a
method for comparing two versions of a design to determine if they are
equivalent. Usually an RTL version of the design is validated using simulation
and other dynamic verification tools, establishing it as the golden version.
Subsequent versions (i.e., after each step of the design process) are then
compared to the golden version, using mathematical algorithms, to determine if
they are functionally equivalent. The use of formal verification greatly reduces
the need to perform simulation, which is substantially more time-consuming, at
each stage of the design process, thus potentially saving a significant amount
of time in the overall design process. Synopsys' formal verification product is
Formality(R). Formality was one of the industry's first commercial equivalency
checkers to employ a multi-solver architecture, which enables the verification
of complex multimillion-gate system-on-a-chip designs in days or minutes.

INTELLECTUAL PROPERTY (IP) AND SYSTEMS LEVEL DESIGN

The Company's IP and Systems Level Design products include our DesignWare
IP library and systems design and verification products.

During fiscal 2001, IP and Systems Level Design products accounted for 12%
of the Company's revenues.

Intellectual Property Products. As IC designs continue to grow in size,
reusing design blocks is becoming a more important method for reducing overall
design cycle time. By reusing portions of a design, and particularly those that
implement basic or standardized functions, a company can let its IC design team
focus on designing the chip features that will give its product a competitive
advantage. It can also reduce its verification risk by ensuring that these
portions of the chip are of high quality. Enabling reuse of intellectual
property (IP) requires a significant methodology shift from traditional IC
design. In the past, designs were intimately tied to a particular semiconductor
process technology or design methodology, making reuse of design blocks from one
chip design to the next, both difficult and costly.

Synopsys' DesignWare(R) product provides IC designers with a single library
of pre-designed and pre-verified synthesizable IP cores as well as over 18,500
verification IP models. The synthesizable IP cores range in complexity from
simple adders and multipliers to PCI-X and USB2.0 cones. The verification IP
models range in complexity from standard 74XX TTL parts to models of complex bus
interface protocols. These models support all major EDA simulation environments
and a wide range of EDA platforms, giving designers access to a broad range of
models to assist them with verification of their designs.

To meet the new challenges of SoC designs, in 2001 Synopsys announced its
Star IP program in which DesignWare users can gain access to popular
microprocessors from MIPS Technologies, Infineon Technologies, NEC and other
providers. In addition, during 2002, the Company expects to add a complete AMBA
On-Chip-Bus to DesignWare.

The Company's IP and Systems Level Design products also include a full
range of hardware modeling solutions. ModelSource(TM) 3000 series is a family of
hardware modeling systems for ASIC and board level design which provide a
flexible means for designers to model complex devices. ModelSource 3000 systems
use the actual integrated circuit to model its own behavior in a larger system.

Systems Design and Verification Products. Currently, automated design
generally begins at the register transfer level, with logic synthesis. The goal
of "system-level" products is to permit designers to design and verify their
products at a level of abstraction above RTL. Synopsys' systems products consist
of the CoCentric(TM) family of tools and methodologies for concurrent design,
validation, refinement and implementation of an electronic system.

The CoCentric family of products is based on "SystemC,(TM)" a standard
language developed by Synopsys and now available under an open source license.
SystemC enables designers to create, validate and share system level models of a
complex IC or system incorporating the chip, and therefore can be used to
explore and verify design alternatives at an early stage of the design process.
EDA and IP vendors have complete access to the SystemC modeling platform
enabling them to build interoperable tools and IP models. SystemC is managed by
the Open SystemC Initiative (OSCI), a not-for-profit organization which includes
representation from the systems, semiconductor, IP, embedded software and EDA
industries. The OSCI Board of
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Directors is composed of representatives from ARM Ltd., Cadence Design Systems,
CoWare, Fujitsu Microelectronics, Mentor Graphics, Motorola, NEC, and Synopsys.

The Company offers two principal products based on SystemC. CoCentric
System Studio is a system-level design environment for the rapid creation of
executable system specifications that can be verified and implemented as
hardware and software functions. System Studio enables designers to use
hierarchical graphical and language modeling to capture system complexity in a
unified environment based on C, C++ and SystemC. System Studio supports
verification of hardware and software design refinements through concurrent
execution of C-based specifications, popular hardware simulators, and a variety
of processor models. Synopsys is in the process of migrating customers of its
COSSAP(R) design system to CoCentric System Studio.

CoCentric SystemC Compiler is a synthesis tool that allows designers to
implement complex circuits from SystemC, enabling design to progress from an
initial C/C++ executable specification into a database readable by Synopsys'
Design Compiler. Eliminating the need to remodel in Verilog or VHDL, SystemC
Compiler accelerates the design cycle by closing the gap between system
designers and hardware designers. SystemC Compiler allows designers to rapidly
create alternative implementations of a design at high abstraction, enabling
them to spend time productively evaluating tradeoffs in performance, size and
power consumption before committing to a particular implementation.

In January 2001, the Company sold its business consisting of silicon
libraries of logic functions to Artisan Components, Inc.

TRANSISTOR LEVEL DESIGN PRODUCTS

Synopsys' transistor level design products include a range of products in
the areas of timing analysis and verification; power management; circuit
simulation and IP verification. These products, which are used after the
completion of physical design, help customers analyze the increasingly important
electrical effects resulting from designing at 0.18 micron and below, and to
locate implementation errors that can be costly and time-consuming to correct
during or after production. As the logic and physical design phases of IC
Implementation grow more and more integrated, the Company is also integrating
many of its transistor level design products with its high level verification
products, particularly in the areas of simulation, timing, and power analysis.

During fiscal 2001, Transistor Level Design products accounted for 7% of
the Company's revenues.

Static Timing Analysis. As part of its overall approach to timing analysis
and verification, Synopsys offers PathMill(R), PathMill Plus and AMPS(R).
PathMill is a transistor-level static timing analysis tool for custom
microprocessor and DSP designs. PathMill's analysis provides SPICE-level
accuracy with 1000x performance improvement over traditional SPICE. PathMill
Plus extends PathMill to offer advanced modeling, model merging and verification
to speed characterization of custom IP blocks. The combination of PrimeTime and
PathMill offers full-chip static timing analysis that covers transistor- to
gate-level designs. These tools are integrated with Arcadia, Synopsys'
resistance and capacitance (RC) extraction tool.

Circuit Simulation. In fiscal 2001, Synopsys introduced NanoSim, an
advanced circuit simulator for memory and mixed-signal verification, which
combines simulation technologies from TimeMill and PowerMill to deliver circuit
simulation, timing, and power analysis in a single tool. NanoSim offers a tight
integration with Synopsys' VCS simulator to deliver high-speed high-capacity
verification of complex ICs. NanoSim and VCS together address verification
challenges at RTL, gate- and transistor-levels, and enable mixed-signal
multi-level verification of complex ICs. NanoSim further enables this flow by
supporting Verilog-A, the industry-standard analog behavioral modeling language.
TimeMill(R) and PowerMill(R) continue to provide high-accuracy, high-speed and
high- capacity circuit simulation technology.

Power Management. Synopsys delivers a complete solution to help designers
manage and verify power consumption at different levels of the design process.
These products include: Power Compiler (described under IC Implementation
category), PrimePower, PowerArc, NanoSim and RailMill. PrimePower is a dynamic,
full-chip power analysis tool for complex multimillion-gate ASICs. PrimePower
allows users to
9

quickly and efficiently verify that their IC designs meet power budgets and
specifications, select the proper packaging, determine cooling requirements and
estimate the battery life for portable applications. As a foundation for
Synopsys' power solution, PowerArc delivers automatic cell library power
characterization, making it easy for library providers and ASIC and silicon
vendors to automatically produce power libraries with SPICE-level accuracy.

SYNOPSYS PROFESSIONAL SERVICES BUSINESS UNIT

Synopsys Professional Services provides a comprehensive portfolio of
consulting services covering all critical phases of the system-on-a-chip
development process, as well as systems development in wireless and broadband
applications. Customers are offered a variety of engagement models ranging from
project assistance -- which helps a customer design, verify and/or test its
chips and improve its design process -- to full turn-key development.

During fiscal 2001, the Synopsys Professional Services business unit
accounted for 12% of the Company's revenues.

ORGANIZATION

Synopsys is currently organized into four product development groups --
Physical Synthesis, Verification Technology, Intellectual Property and Systems,
and Nanometer Analysis and Test -- and a services group -- Synopsys Professional
Services. The Physical Synthesis business unit principally develops and manages
our IC Implementation products. The Verification Technology business unit
develops and manages the simulation products in our Verification and Test
product portfolio. The Intellectual Property and Systems business unit develops
and manages all of the product in the IP and Systems Level Design product
category. The Nanometer Analysis and Test business unit develops and manages the
timing analysis, power and test products in the Verification and Test product
category, and the products in the Transistor Level Design category. In addition
to these product and services groups, Synopsys maintains a World Wide Sales
group, a World Wide Application Services group, a Finance group, a Human
Resources group, and a Technology and Information Systems group.

CUSTOMER SERVICE AND SUPPORT

Synopsys devotes substantial resources to providing customers with
technical support, customer education, and consulting services. The Company
believes that a high level of customer service and support is critical to the
adoption and successful utilization of high-level design automation methodology.
In fiscal 2001, service revenue as a percentage of total revenue increased to
50% as compared to 43% in fiscal 2000.

TECHNICAL SUPPORT

Technical support for the Company's products is provided through both
field- and corporate-based technical application engineering groups. Synopsys
provides customers with software updates and a formal problem identification and
resolution process through the Synopsys Technical Support Center. Synopsys'
central entry point for all customer inquiries is SolvNet(R), a direct-access
service available worldwide, 24 hours per day, through electronic mail and the
World Wide Web that lets customers quickly seek answers to design questions or
more insight into design problems. SolvNet combines Synopsys' complete design
knowledge database with sophisticated information retrieval technology. Updated
daily, it includes documentation, design tips, and answers to user questions.

CUSTOMER EDUCATION SERVICES

Synopsys offers workshops on many aspects of high-level design languages,
high-level design, simulation, synthesis, physical design, system design and
test. Regularly scheduled workshops are offered in Mountain View, California;
Austin, Texas; Burlington, Massachusetts; Reading, England; Rungis, France;
Munich, Germany; Tokyo and Osaka, Japan; Seoul, Korea and other locations.
On-site workshops are worldwide at

10

customers' facilities or other locations. Over 11,000 design engineers attended
Synopsys workshops during fiscal 2001.

PRODUCT WARRANTIES

Synopsys generally warrants its products to be free from defects in media
and to substantially conform to material specifications for a period of 90 days.
Synopsys has not experienced significant returns to date.

SUPPORT FOR INDUSTRY STANDARDS

Synopsys actively creates and supports standards it believes will help its
customers increase productivity and solve design problems, including key
interfaces and modeling languages that promote system-on-a-chip design and
facilitate interoperability of tools from different vendors. Standards in the
EDA industry can be established by formal accredited committees, by licensing
made available to all, or through open source licensing.

Synopsys' products support many formal standards, including the two most
commonly used hardware description languages, VHDL and Verilog HDL, and numerous
industry standard data formats for the exchange of data between Synopsys' tools
and other EDA products.

Synopsys is a board member and/or participant in the following major EDA
standards organizations: Accellera, a not-for-profit formal standards
organization that drives language-based standards for systems, semiconductor,
and design tools companies; the interoperability committee of the EDA
Consortium, which helps promote interoperability among EDA products from
different vendors; and the Virtual Socket Interface Alliance (VSIA), an industry
group formed to promote standards that facilitate the integration and reuse of
functional blocks of intellectual property.

Synopsys' TAP-in program provides interface standards to all companies
through an open source licensing model. Interface formats and reference
implementations, such as parsers and screeners, are available to everyone at no
cost through the Internet. Synopsys manages changes and enhancements that come
from the community of licensees. The open source standards and reference
implementations are used by Synopsys, other EDA companies and EDA customers to
interface tools with each other to produce flexible design flows. The standards
provided by Synopsys as open sources include Liberty for library modeling, SDC
for design constraints, and OpenVera for hardware verification.

SystemC, an open industry standard language, is discussed above under
"Intellectual Property and Systems Products."

Synopsys' products are written mainly in the C and C++ languages and
utilize industry standards for graphical user interfaces. Synopsys' software
runs under UNIX operating systems, such as Solaris and HP-UX, and most products
also run on the open source Linux operating system. Synopsys' products are
offered on the most widely used hardware platforms, including those from Sun
Microsystems, Hewlett-Packard, IBM, and Intel microprocessor-based PCs.

SALES, DISTRIBUTION AND BACKLOG

Synopsys markets its products and services primarily through its direct
sales and application service forces in the United States and principal
international markets. Synopsys employs highly skilled engineers and technically
proficient sales persons in order to understand our customer's needs and to
explain and demonstrate the value of Synopsys' products.

For fiscal 2001, 2000 and 1999, international sales represented 37%, 42%
and 34%, respectively, of Synopsys' total revenue. Additional information
relating to domestic and foreign operations is contained in Note 8 of Notes to
Synopsys' Consolidated Financial Statements.

The Company has sales/support centers throughout the United States, in
addition to its Mountain View, California headquarters. Internationally, the
Company has sales/support offices in Canada, Denmark, Finland, France, Germany,
Hong Kong, India, Israel, Italy, Japan, Korea, the People's Republic of China,
Singapore,
11

Sweden, Taiwan and the United Kingdom, including international headquarters
offices in Ireland. On a very limited basis, the Company also utilizes
manufacturer's representatives and distributors. The Company's offices are
further described under "Item 2 -- Properties."

Synopsys' backlog on December 1, 2001 was approximately $802.7 million,
compared to approximately $462.8 million on December 1, 2000.

This backlog consists of orders for system and software products sold under
perpetual and time-based licenses with customer requested ship dates within
three months which have not been shipped, orders for customer training and
consulting services which are expected to be completed within one year, and
subscription services, maintenance and support with contract periods extending
up to fifteen months. In the case of a Technology Subscription License (TSL),
including a multiyear TSL, backlog includes the full amount of the committed
non-cancelable order, less any amount of revenue that has been recognized on
such TSL.

The Company has not historically experienced significant cancellations of
orders. Customers frequently reschedule or revise the requested ship dates of
orders, however, which can have the effect of deferring recognition of revenue
for these orders beyond the expected time period.

RESEARCH AND DEVELOPMENT

The Company's future performance depends in large part on its ability to
maintain and enhance its current product lines, develop new products, maintain
technological competitiveness and meet an expanding range of customer
requirements. In addition to research and development conducted within each
business unit, the Company maintains an advanced research group that is
responsible for exploring new directions and applications of its core
technologies, migrating new technologies into the existing product lines and
maintaining strong research relationships outside the Company within both
industry and academia.

During fiscal 2001, 2000 and 1999, research and development expenses, net
of capitalized software development costs, were $189.8 million, $189.3 million
and $167.1 million, respectively. Synopsys capitalized software development
costs of approximately $1.0 million, $1.0 million and $0.9 million in fiscal
2001, 2000 and 1999, respectively. The Company anticipates that it will continue
to commit substantial resources to research and development in the future.

MANUFACTURING

Synopsys' manufacturing operations consist of assembling, testing,
packaging and shipping its system and software products and documentation needed
to fulfill each order. Manufacturing is currently performed in Synopsys'
Mountain View, California and Dublin, Ireland facilities. Outside vendors
provide CD-ROM replication, printing of documentation and manufacturing of
packaging materials. Synopsys typically ships its software products within 10
days of acceptance of customer purchase orders and execution of software license
agreements unless the customer has requested otherwise. Upon customer request,
Synopsys delivers its software products through electronic means rather than
shipping disks. This method of delivery is becoming increasingly common for
customers worldwide.

Synopsys employees manufacture and test the hardware modeling system
products, with most sub-assembly performed by outside vendors. For its hardware
modeling products, Synopsys buys components and assemblies in anticipation of
orders and configures units to match orders, typically shipping within one to
ten weeks of order acceptance, unless the customer has requested otherwise.

COMPETITION

The EDA industry is highly competitive. We compete against other EDA
vendors, and with customers' internally developed design tools and internal
design capabilities for a share of the overall EDA budgets of our potential
customers. In general, competition is based on product quality and features,
post-sale support, price and, as discussed below, the ability to offer a
complete design flow. Our competitors include companies that offer a broad range
of products and services, such as Cadence Design Systems, Inc., Avant! and
Mentor
12

Graphics Corporation, as well as companies, including numerous start-up
companies, that offer products focused on a discrete phase of the integrated
circuit design process. In certain situations, Synopsys' competitors have been
offering aggressive discounts on certain of their products, in particular
simulation and synthesis products. As a result, average prices for these
products may fall. In order to compete successfully, we must continue to enhance
our products and bring to market new products that address the needs of our
customers. We also will have to expand our consulting services business. The
failure to enhance existing products, develop and/or acquire new products or
expand our ability to offer consulting services could have a material adverse
effect on our business, financial condition and results of operations.

Technology advances and customer requirements continue to fuel a change in
the nature of competition among EDA vendors. Increasingly, EDA companies compete
on the basis of "design flows" involving integrated logic and physical design
products rather than on the basis of individual "point" tools performing a
discrete phase of the design process. A number of companies, including, Cadence,
Avant!, Magma Design, Synplicity and Monterey Design, are developing or selling
products that link logic and physical design. The need to offer such design flow
synthesis products will become increasingly important, as ICs grow more complex.
In fiscal 2001, we announced new products that would extend our design flow
through physical design, and begin working with target customers to prepare such
products for broader release. If we are unsuccessful in developing a complete
design flow on a timely basis or in convincing customers to adopt our integrated
logical and physical design products and methodology, our competitive position
could be significantly weakened.

PRODUCT SALES AND LICENSING AGREEMENTS

Synopsys typically licenses its software to customers under non-exclusive
license agreements that transfer title to the media only and that restrict use
of the software to specified purposes within specified geographical areas. The
Company currently licenses the majority of its software as a network license
that allows a number of individual users to access the software on a defined
network. License fees are dependent on the type of license, product mix and
number of copies of each product licensed.

Synopsys currently offers its software products under either a perpetual
license or a short-term ratable license. Under a perpetual license a customer
pays a one-time license fee for the right to use the software. The vast majority
of customers buying perpetual licenses also purchase annual software support
services for perpetual licenses, under which they receive minor enhancements to
the products developed during the year, bug fixes and technical assistance. A
ratable license, and the various forms of time-based licenses that the Company
has offered before introducing ratable licenses, operates like a rental of
software which typically includes software support services. A customer pays a
fee for license and support over a fixed period of time, and at the end of the
time period the license expires unless the customer pays for a renewal. Ratable
licenses are offered with a range of terms; the average length is approximately
3.0 to 3.5 years. See "Management's Discussion and Analysis of Financial
Condition and Results of Operations -- Results of Operations -- Revenue".

Over the past several years, orders for time-based licenses (now ratable
licenses) have increased significantly as a percentage of total product orders.
During fiscal 2001, orders for time-based licenses, including ratable licenses,
accounted for 86% of total product orders compared to 74% in fiscal 2000 and 64%
in fiscal 1999.

During fiscal 2002 Synopsys expects that orders for ratable licenses will
account for approximately 75% to 85% of total product orders and orders for
perpetual licenses approximately 15% to 25% of total product orders.

Synopsys offers its hardware modeler products for sale or lease.

PROPRIETARY RIGHTS

The Company primarily relies upon a combination of copyright, patent,
trademark and trade secret laws and license and nondisclosure agreements to
establish and protect proprietary rights in its products. The source code for
Synopsys' products is protected both as a trade secret and as an unpublished
copyrighted work.

13

However, it may be possible for third parties to develop similar technology
independently. In addition, effective copyright and trade secret protection may
be unavailable or limited in certain foreign countries. The Company currently
holds U.S. and foreign patents on some of the technologies included in its
products and will continue to pursue additional patents in the future.

Although the Company believes that its products, trademarks and other
proprietary rights do not infringe on the proprietary rights of third parties,
there can be no assurance that infringement claims will not be asserted against
the Company in the future or that any such claims will not require the Company
to enter into royalty arrangements or result in costly and time-consuming
litigation.

EMPLOYEES

As of November 3, 2001, Synopsys had a total of 3,223 employees, of whom
2,351 were based in North America and 872 were based internationally. Synopsys'
future financial results depend, in part, upon the continued service of its key
technical and senior management personnel and its continuing ability to attract
and retain highly qualified technical and managerial personnel. Competition for
such personnel is intense. Our success is dependent on technical and other
contributions of key employees. We participate in a dynamic industry, with
significant start-up activity, and our headquarters is in Silicon Valley, where
skilled technical, sales and management employees are in high demand. There are
a limited number of qualified EDA and IC design engineers, and the competition
for such individuals is intense. Experience at Synopsys is highly valued in the
EDA industry and the general electronics industry, and our employees are
recruited aggressively by our competitors and by start-up companies in many
industries. In the past, we have experienced, and may continue to experience,
significant employee turnover. There can be no assurance that Synopsys can
retain its key managerial and technical employees or that it can attract,
assimilate or retain other highly qualified technical and managerial personnel
in the future. None of Synopsys' employees is represented by a labor union.
Synopsys has not experienced any work stoppages and considers its relations with
its employees to be good.

ITEM 2. PROPERTIES

Synopsys' principal offices are located in four adjacent buildings in
Mountain View, California, which together provide approximately 400,000 square
feet of available space. This space is leased through February 2015. Within one
half mile of these buildings, in Sunnyvale, California, Synopsys occupies
approximately 200,000 square feet of space in two adjacent buildings, which are
under lease through 2007, and approximately 85,000 square feet of space in a
third building, which is under lease until April 2007.

The Company currently leases approximately 45,000 square feet in Dublin,
Ireland for its international headquarters and for research and development
purposes. This space is leased through April 2025.

The Company leases approximately 93,000 square feet of space in Beaverton,
Oregon for administrative, marketing, research and development and support
activities. This facility is leased through March 2002, and will be replaced by
the newly constructed site in Hillsborough, Oregon.

In addition, the Company leases approximately 82,000 square feet of space
in Marlboro, Massachusetts for sales and support, research and development and
customer education activities. This facility is leased through March 2009.

The Company currently leases 25 other sales offices throughout the United
States. Synopsys currently leases international sales and service offices in
Canada, Finland, France, Germany, Hong Kong, India, Israel, Italy, Japan, Korea,
the People's Republic of China, Singapore, Sweden, Taiwan, and the United
Kingdom. The Company also leases research and development facilities in France,
Germany and India.

Synopsys owns a fourth building in Sunnyvale, with approximately 120,000
square feet, which is leased to a third party through May 2003. Synopsys also
owns thirty-four acres of undeveloped land in San Jose, California and 13 acres
of undeveloped land in Marlboro, Massachusetts. Additionally, Synopsys owns
forty-four acres of land in Hillsborough, Oregon on which two buildings,
totaling 236,000 square feet, are being constructed. In February 2002, this
facility will replace the leased site in Beaverton.
14

ITEM 3. LEGAL PROCEEDINGS

On December 6, 2001, Mentor Graphics and its subsidiary Fresno Corporation
filed a lawsuit in the Court of Chancery of the State of Delaware (C.A. No.
19299) against IKOS, the members of IKOS' board of directors, Synopsys and
Synopsys' subsidiary Oak Merger Corporation ("Oak"). The lawsuit claims that
certain provisions of the Synopsys -- IKOS Merger Agreement ("Merger
Agreement"), including the termination fee and no-shop provisions and certain
restrictive covenants relating to the interim operations of IKOS, were entered
into in breach of the IKOS directors' fiduciary duties, and that Synopsys and
Oak aided and abetted those breaches. The lawsuit seeks, among other relief,
injunctive and declaratory relief, including an order enjoining the enforcement
of the no-shop and termination fee provisions of the Merger Agreement, and
unspecified damages. On January 2, 2002, Synopsys and Oak filed a motion to
dismiss Mentor Graphics' complaint. No date has been set for trial in this
matter but the parties have begun to engage in discovery.

On December 10, 2001, Ernest Hack, an alleged stockholder of IKOS, filed an
alleged class action lawsuit in the Court of Chancery of the State of Delaware
(C.A. No. 19305) against IKOS, the IKOS directors and Synopsys. While not
identified as such in the caption of the complaint, the body of the complaint
also describes Mentor Graphics as a defendant. This lawsuit alleges that the
members of IKOS' board failed to properly consider and act upon Mentor Graphics'
offer to acquire IKOS. The lawsuit also alleges that IKOS failed to solicit
offers before entering the Merger Agreement. The lawsuit alleges that, as a
result of the foregoing among other things, the members of IKOS' board breached
their fiduciary duties. The lawsuit alleges that Synopsys aided and abetted the
IKOS board in the alleged breach of their fiduciary duties. The lawsuit seeks
injunctive relief and unspecified damages. The plaintiffs in this action have
proposed its consolidation with certain other purported class actions pending in
the Chancery Court against IKOS and its board; actions in which Synopsys is not
named as a defendant. No date has been set for trial in this matter.

On December 14, 2001, Scott Petler, an alleged stockholder of IKOS, filed
an alleged class action lawsuit in California Superior Court in Santa Clara
County, California (Case No. CV 803814) against IKOS, the members of IKOS' board
of directors, Synopsys and Synopsys Chairman and Chief Executive Officer Aart de
Geus. The lawsuit alleges generally that the members of the IKOS board breached
their fiduciary duties in connection with the Merger Agreement and that Synopsys
and that Dr. de Geus aided and abetted those alleged breaches of fiduciary
duties. The lawsuit seeks a declaration by the Court that IKOS and certain of
its directors and officers entered into the Merger Agreement in breach of their
fiduciary duties. Plaintiffs also seek preliminary and permanent injunctive
relief preventing consummation of the Synopsys-IKOS acquisition as currently
structured. Plaintiffs do not seek monetary damages against Synopsys, Dr. de
Geus, or any other defendant, but do seek costs and disbursements, including
attorneys' and experts' fees.

Synopsys believes that these lawsuits are without merit and intends to
vigorously contest each lawsuit.

The foregoing information is current as of January 7, 2002. Additional
information concerning developments relating to the Merger Agreement and the
litigation matters described above after that date may be disclosed in further
amendments to the Schedule TO of Mentor Graphics and the Schedule 14D-9 of IKOS,
and in filings with the SEC by Synopsys.

There are no other material legal proceedings pending against the Company.

ITEM 4. SUBMISSION OF MATTERS TO A VOTE OF SECURITY HOLDERS

No matters were submitted for a vote of security holders during the fourth
quarter of the fiscal year covered by this Report.

15

EXECUTIVE OFFICERS OF THE COMPANY

The executive officers of the Company and their ages, as of January 1,
2002, are as follows:

Dr. Aart J. de Geus co-founded Synopsys and currently serves as Chief
Executive Officer and Chairman of the Board of Directors. Since the inception of
Synopsys in December 1986, he has held a variety of positions including Senior
Vice President of Engineering and Senior Vice President of Marketing. From 1986
to 1992, Dr. de Geus served as Chairman of the Board. He served as President
from 1992 to 1998. Dr. de Geus has served as Chief Executive Officer since
January 1994 and has held the additional title of Chairman of the Board since
February 1998. He has served as a Director since 1986. From 1982 to 1986, Dr. de
Geus was employed by General Electric Corporation, where he was the Manager of
the Advanced Computer-Aided Engineering Group. Dr. de Geus holds an M.S.E.E.
from the Swiss Federal Institute of Technology in Lausanne, Switzerland and a
Ph.D. in electrical engineering from Southern Methodist University.

Dr. Chi-Foon Chan joined Synopsys as Vice President of Application
Engineering & Services in May 1990. Since April 1997 he has served as Chief
Operating Officer and since February 1998 he has held the additional title of
President. Dr. Chan also became a Director of the Company in February 1998. From
September 1996 to February 1998 he served as Executive Vice President, Office of
the President. From February 1994 until April 1997 he served as Senior Vice
President, Design Tools Group and from October 1996 until April 1997 as Acting
Senior Vice President, Design Reuse Group. Additionally, he has held the titles
of Vice President, Engineering and General Manager, DesignWare Operations and
Senior Vice President, Worldwide Field Organization. From March 1987 to May
1990, Dr. Chan was employed by NEC Electronics, where his last position was
General Manager, Microprocessor Division. From 1977 to 1987, Dr. Chan held a
number of senior engineering positions at Intel Corporation. Dr. Chan holds an
M.S. and Ph.D. in computer engineering from Case Western Reserve University.

Vicki L. Andrews joined Synopsys in May 1993 and currently serves as Senior
Vice President, Worldwide Sales. Before holding that position, she served in a
number of senior sales roles at Synopsys, including Vice President, Global and
Strategic Sales, Vice President, North America Sales and Director, Western
United States Sales. She has more than 18 years of experience in the EDA
industry. Ms. Andrews holds a B.S. in biology and chemistry from the University
of Miami.

Robert B. "Brad" Henske joined Synopsys in May 2000 and currently serves as
Senior Vice President and Chief Financial Officer. Mr. Henske joined Synopsys
from Oak Hill Capital Management, a Robert M. Bass Group private equity
investment firm where he was a partner from January 1997 to April 2000.
Additionally, Mr. Henske was Executive Vice President and Chief Financial
Officer, and a member of the board of directors of American Savings Bank, F.A.,
a Bass portfolio company, from January 1996 to December 1996. Prior to that, he
was a business strategy and financial consultant for Bain & Company from
September 1988 to December 1995, where he last held the position of Vice
President. Mr. Henske received an MBA in finance and strategic management from
The Wharton School, University of Pennsylvania. He has served on the board of
directors for several companies, including Grove Worldwide, L.L.C., Williams
Scotsman, Inc., Reliant Building Products, Inc. and American Savings Bank, F.A.

16

Steven K. Shevick joined Synopsys in July 1995 and currently serves as Vice
President, Investor Relations and Legal, General Counsel and Corporate
Secretary. From July 1995 to March 1998 he served as Deputy General Counsel and
Assistant Corporate Secretary. In March 1998 he was appointed Vice President,
Legal and General Counsel. In October 1999, Mr. Shevick gained the additional
title of Vice President of Investor Relations and was appointed Corporate
Secretary. Prior to joining Synopsys, Mr. Shevick was a lawyer in the New York,
Hong Kong and Washington, D.C. offices of Cleary, Gottlieb, Steen & Hamilton,
where his practice focused on international securities transactions, mergers and
acquisitions and technology licensing. Mr. Shevick holds an A.B. from Harvard
College and a J.D. from Georgetown University Law Center.

There are no family relationships among any executive officers of the
Company.

PART II

ITEM 5. MARKET FOR REGISTRANT'S COMMON EQUITY AND RELATED STOCKHOLDER MATTERS

The information required by this item is set forth on page 64 of this
Synopsys 2001 Annual Report on Form 10-K.

ITEM 6. SELECTED FINANCIAL DATA

FINANCIAL SUMMARY

- ---------------

(1) Amounts and per share data for periods presented have been retroactively
restated to reflect the mergers accounted for under the pooling-of interests
method with Viewlogic Systems, Inc, effective December 4, 1997, and Everest
Automation, Inc., effective November 21, 1998.

(2) Synopsys has a fiscal year that ends on the Saturday nearest October 31.
Fiscal years 2000, 1999 and 1997 were 52-week years while fiscal years 2001
and 1998 were 53-week years. Fiscal year 2002 will be a 52-week year. For
presentation purposes, the consolidated financial statements refer to the
calendar month end. Prior to fiscal year 2000, Synopsys' fiscal year ended
on the Saturday nearest to September 30. The period from October 1, 1999
through October 31, 1999 was a transition period. During the transition
period, revenue, loss before income taxes, benefit for income taxes and net
loss were $23.2 million, $25.5 million, $9.9 million, and $15.5 million,
respectively, and basic and diluted loss per share was $0.22. The net loss
during the transition period is due to the fact that sales in the first
month following a quarter end are historically weak. As of October 31, 1999,
working capital, total assets, long-

17

term debt, and stockholders' equity were $621.9 million, $1.2 billion, $11.3
million and $872.6 million, respectively.

(3) Includes charges of $1.7 million, $21.2 million, $33.1 million, $5.5
million, for the fiscal years ended October 31, 2000 and September 30, 1999,
1998, and 1997, respectively, for in-process research and development.
Includes merger-related and other costs of $51.0 million and $11.4 million
for the years ended September 30, 1998 and 1997, respectively.

(4) On October 2, 1998, Synopsys sold a segment of the Viewlogic business for
$51.9 million in cash. As a result of the transaction, Synopsys recorded an
extraordinary gain of $26.5 million, net of income tax expense, in the
fourth quarter of fiscal 1998.

ITEM 7. MANAGEMENT'S DISCUSSION AND ANALYSIS OF FINANCIAL CONDITION AND RESULTS
OF OPERATIONS

The following discussion contains forward-looking statements within the
meaning of Section 21E of the Securities Exchange Act of 1934. For example,
statements including terms such as "projects," "expects," "believes,"
"anticipates" or "targets" are forward-looking statements. Actual results could
differ materially from those anticipated in such forward-looking statements as a
result of certain factors, including those set forth under "Factors That May
Affect Future Results."

RESULTS OF OPERATIONS

Introduction of Technology Subscription Licenses (TSLs). On July 31, 2000,
we introduced TSLs, which are time-limited rights to use our software. Since
TSLs include bundled product and services, both product and service revenue is
generally recognized ratably over the term of the license, or, if later, as
payments become due. The terms of TSLs, and the payments due thereon, may be
structured flexibly to meet the needs of the customer. With minor exceptions,
under TSLs, customers cannot obtain major new products developed or acquired
during the term of their license without making an additional purchase. Overall,
we believe that TSLs have enabled us to (i) offer customers technology and terms
that more closely match their needs; (ii) have greater visibility into our
earnings stream; (iii) more effectively resist customer requests for special
end-of-the-quarter discounts; and (iv) roll out our new technologies in a more
planned manner.

The replacement of the prior form of time-based licenses by TSLs has
impacted and will continue to impact our reported revenue. Under a ratable
license, relatively little revenue is recognized during the quarter the product
is delivered. The remaining amount is recorded as deferred revenue to the extent
that the license fee has been paid or invoiced, to be recognized over the term
of the license, or is considered backlog by the Company. This backlog is not
recorded on our balance sheet. Under the prior form of time-based licenses, a
high proportion of all license revenue was recognized in the quarter that the
product was delivered, with relatively little recorded as deferred revenue or as
backlog. Therefore, an order for a TSL will result in significantly lower
current-period revenue than an equal-sized order under the prior form of
time-based license.

We set revenue targets for any given period based, in part, upon an
assumption that we will achieve a certain license mix of perpetual licenses and
TSLs. The actual mix of licenses sold affects the revenue we recognize in the
period. If we are unable to achieve our target license mix, we may not meet our
revenue targets. In fiscal 2001, our license mix for new orders was 80% TSLs and
20% perpetual licenses which is within our targeted range. The average term of
our TSL licenses sold in 2001 was between 3.0 and 3.5 years, which is longer
than expected. Given the difference in the revenue profile of TSLs and perpetual
licenses, this shift in license mix will reduce revenue in the short-term. We
anticipate that our license mix for fiscal 2002 will be approximately 15% to 25%
perpetual licenses and 75% to 85% TSLs.

Business Combinations and Divestitures. On January 4, 2001, we sold the
assets of our silicon libraries business to Artisan Components, Inc. (Artisan)
for a total sales price of $15.5 million, including common stock with a fair
value on the date of sale of $11.4 million, and cash of $4.1 million. The net
book value of the assets sold was $1.4 million. Expenses incurred in connection
with the sale were $3.5 million. We recorded a gain on the sale of the business
of $10.6 million, which is included in other income, net. Direct revenue for the

18

silicon libraries business was $0.2 million, $4.3 million and $10.1 million for
the fiscal years 2001, 2000 and 1999, respectively.

There were no business combinations completed in fiscal 2001.

In fiscal 2000, we acquired (i) VirSim, a software product, from Innoveda,
Inc., for a purchase price of approximately $7.0 million in cash, (ii) The
Silicon Group, Inc., a privately held provider of integrated circuit design and
intellectual property integration services, for a purchase price of $3.0
million, including cash payments of $1.8 million and a reserve of approximately
34,000 shares of common stock for issuance under The Silicon Group's stock
option plan which was assumed in the transaction, and (iii) Leda, S.A. (Leda), a
privately held provider of RTL coding-style-checkers, for a purchase price of
$7.7 million, including cash payments of $7.5 million. Approximately $1.7
million of the Leda purchase price was allocated to in-process research and
development and charged to operations because the acquired technology had not
reached technological feasibility and had no alternative uses. The purchase
price of each of these transactions was allocated to the acquired assets and
liabilities based on their estimated fair values as of the date of the
respective acquisition. Amounts allocated to developed technology, workforce and
goodwill are being amortized on a straight-line basis over periods ranging from
three to five years.

In fiscal 1999, we issued approximately 1.4 million shares of common stock
for all the outstanding stock of Everest, a developer of integrated circuit
routing and related technology, and reserved approximately 120,000 shares of
common stock for issuance under Everest's stock option plan, which we assumed in
the transaction. The business combination was accounted for as a pooling of
interests, and accordingly, our consolidated financial statements have been
restated to include the financial position and results of Everest for all
periods prior to the merger date.

In fiscal 1999, we acquired (i) Gambit Automated Design, Inc. (Gambit), a
privately held provider of place and route software and physical design services
for a purchase price of $41.3 million including, $29.2 million in cash, $8.0
million in notes payable and a reserve of approximately 78,000 shares of common
stock for issuance under Gambit's stock option plan which was assumed in the
transaction, (ii) Stanza Systems, Inc. (Stanza), a privately held company with
physical layout editor expertise and technology for a purchase price of $15.4
million including, $11.0 million in cash, the issuance of approximately 46,000
shares of common stock and a reserve of approximately 21,000 shares of common
stock for issuance under Stanza's stock option plan which was assumed in the
transaction, (iii) Smartech OY, a privately held design services firm with
expertise in the design of wireless communication devices for a purchase price
of approximately $9.7 million in cash, (iv) the rights to CoverMeter, a Verilog
code coverage tool, from Advanced Technology Center of Massachusetts
(CoverMeter) for a purchase price of $4.5 million including $2.3 million in cash
and $2.2 million of notes payable, and (v) Apteq, Inc. (Apteq) which has an
expertise in analog simulation and Verilog-A product for a purchase price of
$2.0 million including $1.0 million in cash, notes payable of $0.6 million and
$0.4 million in the assumption of debt. Amounts allocated to in-process research
and development and charged to operations because the acquired technology had
not reached technological feasibility and had no alternative future uses were
(i) $13.9 million for Gambit (ii) $4.1 million for Stanza, (iii) $2.4 million
for CoverMeter and (iv) $0.8 million for Apteq. The purchase price of each of
the transactions was allocated to the acquired assets and liabilities based on
their estimated fair values as of the date of the respective acquisition.
Amounts allocated to developed technology, workforce and goodwill are being
amortized on a straight-line basis over periods ranging from three to five
years.

Revenue. Revenue consists of fees for perpetual and ratable licenses of
the Company's software products, sales of hardware system products,
post-contract customer support (PCS), customer training and consulting. We
classify revenues as product, service or ratable license. Product revenue
consists primarily of perpetual and non-ratable time-based license revenue.
Service revenue consists of PCS under perpetual and non-ratable time-based
licenses and fees for consulting services and training. Ratable license revenue
consists of revenue from TSLs and from time-based licenses that include extended
payment terms or unspecified additional products.

Revenue for fiscal 2001 decreased 13% to $680.4 million, as compared to
$783.8 million for fiscal 2000, consistent with our expectations. The decrease
in revenue in 2001 compared to 2000 is due to the utilization
19

for the full 2001 fiscal year of the ratable license model and the related
inherent decrease in revenue due to the timing of revenue recognition under this
license model.

Product revenue decreased by 62% to $163.9 million in fiscal 2001 from
$434.1 million in fiscal 2000 and decreased by 14% from $505.8 million in fiscal
1999 compared to fiscal 2000. The decrease in fiscal 2001 and fiscal 2000 is
primarily due to the change in the license model to TSLs, for which revenue is
recognized ratably over the term of the license.

Service revenue consists of consulting revenue, training and PCS on
perpetual licenses. Service revenue remained relatively flat at $341.8 million
in fiscal 2001 compared to $340.8 million in fiscal 2000. Service revenue in the
first half of fiscal 2001 was $178.5 million, compared to $168.1 million for the
same period in fiscal 2000. This 6% increase was a result of increased sales of
our turnkey design and wireless and broadband consulting services. However, full
fiscal year 2001 services revenue was impacted by cost-cutting efforts by
customers during the second half of the fiscal year, which led to rescheduling
of delivery dates on certain consulting projects and cancellation of others. As
a result, projects anticipated to produce revenue in the second half of fiscal
2001 were not completed. Assuming no improvement in the current economic
climate, the Company anticipates that customers will continue to review their
engagements with outside consultants, and may eliminate or defer those
determined to be non-critical. During fiscal 2000, service revenue increased by
13% from $300.3 million in fiscal 1999 compared to fiscal 2000. This increase
was primarily attributable to the renewal of maintenance and support contracts
for EDA products and growth in customer training and consulting services.

Over time, service revenue will be impacted by three trends. First, new
licenses are increasingly structured as TSLs including the bundled PCS. Second,
customers with existing perpetual licenses are increasingly entering into new
TSLs rather than renewing the PCS on the existing perpetual license. Third,
customers with existing perpetual licenses are increasingly converting their
existing licenses to TSLs. Each of these trends will result, over time, in lower
service revenue.

Ratable license revenue was $174.6 million for fiscal 2001 and $8.9 million
for fiscal 2000. During fiscal 2001, ratable revenue equaled $31.0 million,
$38.9 million, $49.8 million and $54.9 million for the first, second, third and
fourth quarters of 2001, respectively, increasing on a sequential quarter basis
in each quarter of the year. We expect sequential increases to continue through
fiscal 2002.

International Revenue. The following table summarizes the performance of
the various geographic regions as a percent of total Company revenue:

Revenue from international operations was $253.9 million, $327.0 million
and $275.2 million, or 37%, 42% and 34% of total revenue in fiscal 2001, 2000
and 1999, respectively. In any given period, the geographic mix of revenue is
influenced by the particular contracts closed during that quarter, although the
fluctuation on geographical mix should become less pronounced as the ratable
revenue model continues to phase in. The decline in international revenues from
fiscal 2000 to fiscal 2001 is due to a decline in the revenue contribution from
Japan. The increase in international revenue as a percentage of total revenue in
fiscal 2000 compared to fiscal 1999 was primarily a result of relatively greater
revenue growth in Japan.

Revenue Expectations. During fiscal 2002, we expect revenue to consist of
approximately 20% perpetual licenses, 40% TSLs and 40% services. Due to the
current economic environment, we do not currently have sufficient visibility
into revenues for the full fiscal 2002 year to be able to forecast such full
year revenues with
20

a reasonable accuracy. These expectations do not take into account the potential
impact of the proposed mergers with Avant!, Inc. and IKOS Systems, Inc.

Revenue -- Product Groups. For management reporting purposes, our products
have been organized into four distinct product groups -- IC Implementation,
Verification and Test, Intellectual Property (IP) and System Level Design,
Transistor Level Design -- and a services group -- Professional Services. The
following table summarizes the revenue attributable to the various groups and as
a percentage of total Company revenue since the introduction of the ratable
license model:

IC Implementation. IC implementation includes two product categories, the
Design Compiler (DC) Family and Physical Synthesis. The DC Family includes
Design Compiler, our core logic synthesis product, Power Compiler, which permits
optimization of the design of low power circuits, and Module Compiler, which is
used in the design of complex datapaths.

Quarterly revenue from the DC Family has increased since the introduction
of our ratable license model, from $44.7 million in the fourth quarter of 2000
to $58.0 million in the fourth quarter of 2001. This increase is driven by a
continued increase in revenues from Design Compiler. As a percentage of total
revenue, the DC Family has remained relatively flat over the last five quarters,
ranging from 32% to 34%. While we expect the relative revenue contribution from
the DC Family to decline over time as our customers transition from the DC
Family products to Physical Synthesis products, Design Compiler remains one of
our top-selling products.

Included in the Physical Synthesis family is Physical Compiler, a product
that unifies synthesis, placement and global routing, Chip Architect, a chip
floor-planning product, and our detailed routing technology. During the fourth
quarter of 2001, we announced our Route Compiler and ClockTree Compiler
products. Quarterly revenue from this product family has increased sequentially
over the last five quarters with the exception of the first quarter of 2001. The
overall increase in quarterly sales is related primarily to an increase in
revenues from Physical Compiler. The decrease in revenue in the first quarter of
2001 compared to the fourth quarter of 2000 is due to the mix of license types
sold in the quarter; specifically, fewer perpetual licenses were sold in that
quarter compared to the preceding and following quarters.

Verification and Test. Verification and Test includes our simulation,
timing analysis, formal verification and test products. Revenue has increased in
each quarter since the introduction of our ratable license model. These
sequential increases are primarily due to growth in revenue for our Verilog
simulator, VCS and Prime Time.

Intellectual Property (IP) and Systems Products. Our IP and Systems
Products Group includes the DesignWare library of design components and
verification models, and system design products. Revenue increased sequentially
from the fourth quarter of fiscal 2000 through the third quarter of fiscal 2001,
primarily due to increased DesignWare revenue. In the first quarter of fiscal
2001, we sold our silicon libraries business, which contributed direct revenue
of $0.2 million and $0.5 million, in the first quarter of fiscal 2001 and the

21

fourth quarter of fiscal 2000, respectively. During the fourth quarter of fiscal
2001, there was a decrease in revenue as compared to the third quarter of fiscal
2001 from our DesignWare product of approximately $1.0 million due to an
increase in the average term of the subscription or ratable licenses in fiscal
2001 in comparison to fiscal 2000. During the fourth quarter of fiscal 2001, we
also discontinued our Eagle product, which in fiscal 2001 and 2000 contributed
direct revenue of $2.4 million and $3.3 million, respectively.

Transistor Level Design. Our transistor level design product group
includes tools that are used in transistor-level simulation and analysis.
Revenue in total, and as a percent of total Company revenue, from this product
group has fluctuated since the introduction of TSLs as a result of the mix of
license types of orders received. The decline in the fourth quarter is due
primarily to an increase in the percentage of ratable licenses during the fourth
quarter as compared to the third quarter.

Professional Services. The Professional Services group includes consulting
and training. This group provides consulting services, including design
methodology assistance, specialized telecommunications systems design services
and turnkey design. Revenue from professional services increased quarterly from
the fourth quarter of 2000 through the second quarter of 2001 as a result of
increased sales of our turnkey design and wireless and broadband consulting
services. However, in the third quarter of 2001, revenue from professional
services declined 23% in comparison to the previous quarter and decreased an
additional 3% in the fourth quarter of 2001, as compared to the third quarter.
These decreases in service revenue in the second half of fiscal 2001 are the
result of certain consulting projects, which were not completed as delivery
dates were pushed out to future periods or canceled by customers. This was
caused by the tightening economy. Due to the current economic climate, customers
may continue to reduce costs, cancel orders or extend the delivery dates on
existing purchase orders.

Cost of Revenue. Cost of product revenue includes personnel and related
costs, production costs, product packaging, documentation, amortization of
capitalized software development costs and purchased technology, and costs of
the components of the our hardware system products. The cost of internally
developed capitalized software is amortized based on the greater of the ratio of
current product revenue to the total of current and anticipated product revenue
or the straight-line method over the software's estimated economic life of
approximately two years. Cost of product revenue was 12% of total product
revenue for fiscal 2001, as compared to 8% for fiscal 2000. This increase in
cost of product revenue as a percentage of total product revenue is due
primarily to the write-off of certain Eagle intangible assets totaling $1.8
million and an increase in the inventory reserve totaling $1.3 million related
to our hardware modeling product because we are transitioning customers to the
next generation product. The Company's product costs are relatively fixed and do
not fluctuate significantly with changes in revenue or changes in revenue
recognition methods. Cost of product revenue was 7% of total product revenue for
fiscal 1999.

Cost of service revenue includes consulting services, personnel and the
related costs associated with providing training, and PCS on perpetual licenses.
Cost of service revenue as a percentage of total service revenue has remained
relatively flat at 23% in fiscal 2001, 24% in fiscal 2000 and 23% in 1999.

Since TSLs include bundled product and services, cost of ratable license
revenue includes the costs of product and services related to our TSLs. Cost of
ratable license revenue was 17% for fiscal 2001.

Because cost of product and TSL revenue is based on the mix of orders, as
customers migrate to the TSL model, cost of product revenue will decrease as a
percentage of total revenues. Over time, as more TSL deferred revenue is
amortized, cost of TSL revenue will also decrease as a percentage of revenue.
During fiscal 2002, we expect that the cost of product revenue as a percent of
total product revenue will remain flat and the cost of TSL revenue as a percent
of total TSL revenue will either remain flat or decrease slightly. The cost of
service revenue as a percent of the related revenue is also expected to remain
relatively flat or decrease slightly.

Research and Development. Research and development expenses, net of
capitalized software development costs, in terms of annual spending, remained
relatively flat at $189.8 million in fiscal 2001, compared to $189.3 million in
fiscal 2000, and increased by 13% in fiscal 2000 compared to $167.1 million in
fiscal 1999. The change in absolute dollars between 2001 and 2000 reflects
increases in personnel related costs, recruiting

22

costs and depreciation expense offset by a decrease in facilities due to certain
facilities which were acquired in the Gambit acquisition and closed during the
fourth quarter of fiscal 2000, as well as decreases in equipment repairs,
advertising expenses and travel and entertainment costs. Research and
development expenses represented 28%, 24% and 21% of total revenue in fiscal
2001, 2000 and 1999, respectively. The increase in research and development
expenses as a percentage of total revenue is due to the decrease in total
revenues as a result of a change in our license model. The increase in research
and development spending in fiscal 2000 compared to fiscal 1999 was due
primarily to increases in personnel and related costs as a result of business
combinations and higher levels of research and development staffing in support
of our roll-out of Physical Compiler. In each year, additions of personnel were
made to facilitate the enhancement of existing applications and development of
new products. We believe that to maintain our competitive position in a market
characterized by rapid rates of technological advancement, we must continue to
invest significant resources in new systems and software, and continue to
enhance existing products. We anticipate that we will continue to commit
substantial resources to research and development in the future. If we determine
that we are unable to enter a particular market in a timely manner, we may
license technology from other businesses or acquire other businesses as an
alternative to internal research and development.

Sales and Marketing. Sales and marketing expenses decreased by 5% to
$274.0 million in fiscal 2001 from $288.8 million in fiscal 2000 and increased
by 20% from $241.4 million in fiscal 1999 compared to fiscal 2000. Total
expenses decreased in fiscal 2001 as compared to fiscal 2000 primarily as a
result of decreases in annual bonuses, travel, consulting expenses, recruiting,
advertising and depreciation expense, offset by increases in personnel-related
costs. Sales and marketing expenses represented 40%, 37% and 30% of total
revenue in fiscal 2001, 2000 and 1999, respectively. Sales and marketing
expenses increased as a percentage of total revenue due to a decrease in total
revenue as a result of the change in our license model. Total expenses increased
in absolute dollars in fiscal 2000 compared to fiscal 1999 primarily as a result
of an increase in sales commissions and bonus costs.

General and Administrative. General and administrative expenses increased
18% to $69.7 million in fiscal 2001 compared to $59.2 million in fiscal 2000.
General and administrative expense increased from $47.2 million in fiscal 1999
compared to fiscal 2000. General and administrative expenses increased during
fiscal 2001 due to increases in bad debt expense, facility expenditures and
consulting services related to the upgrade of our current computer systems
offset by a decrease in personnel costs. As a percentage of total revenue,
general and administrative expenses were 10%, 8% and 6% in fiscal 2001, 2000 and
1999, respectively. The increase in general and administrative expenses
increased as a percentage of total revenue due to a decrease in total revenue as
a result of the change to our license model. In fiscal 2000, the increase in
absolute dollars and percentage of revenue compared to fiscal 1999 was primarily
due in part to increases, in order of magnitude, in personnel costs, an increase
in bad debt expense relating to the accounts receivable allowance provided in
accordance with our historical trends, facility expenditures and patent and
proxy services.

Operating Expense Targets -- Fiscal 2002. As a result of our cost-cutting
measures implemented in the fourth quarter of fiscal 2001 and affecting expense
levels in fiscal 2002, we expect that total operating expenses for the full
fiscal year 2002 will be relatively flat compared to fiscal 2001 levels.

Amortization of Intangible Assets. Intangible assets represent the excess
of the aggregate purchase price over the fair value of the tangible assets and
other identifiable intangible assets acquired by the Company (goodwill). Under
our accounting policies, intangible assets as of October 31, 2001, including
goodwill, are being amortized over the estimated useful life of three to five
years. Amortization of intangible assets charged to operations amounted to $17.0
million, $15.1 million and $7.9 million in fiscal 2001, 2000 and 1999,
respectively.

We periodically evaluate our intangible assets for indications of
impairment. If this evaluation indicates that the value of the intangible asset
may be impaired, an evaluation of the recoverability of the net carrying value
of the asset over its remaining useful life is made. If this evaluation
indicates that the intangible asset is not recoverable, based on the estimated
undiscounted future cash flows of the entity or technology acquired over the
remaining amortization period, the net carrying value of the related intangible
asset will be reduced to fair value and the remaining amortization period may be
adjusted. In fiscal 2001, we recognized an aggregate

23

impairment charge of $2.2 million to reduce the amount of certain intangible
assets associated with prior acquisitions to their estimated fair value.
Approximately $1.8 million and $0.4 million are included in cost of revenues and
amortization of intangible assets, respectively, on the statement of operations.
The impairment charge is attributable to certain technology acquired from, and
goodwill related to the acquisition of Eagle Design Automation, Inc. in 1997.
During the fourth quarter of fiscal 2001, we determined that we would not
allocate future resources to assist in the market growth of this technology and
we do not anticipate any future sales of the product. There were no impairments
of intangible assets in fiscal 2000 and 1999.

In-Process Research and Development. The following paragraphs contain
forward-looking statements within the meaning of Section 21E of the Securities
Exchange Act of 1934, including statements and assumptions regarding percentage
of completion, expected product release dates, dates for which we expect to
begin generating benefits from projects, expected product capabilities and
product life cycles, costs and efforts to complete projects, growth rates,
royalty rates and projected revenue and expense information used by us to
calculate discounted cash flows and discount rates. These forward-looking
statements involve risks and uncertainties, and the cautionary statements set
forth below and in "Factors that May Affect Future Results" identify important
factors that could cause actual results to differ materially from those
predicted in any such forward-looking statement.

Purchased in-process research and development (IPRD) of $1.7 million and
$21.2 million in fiscal 2000 and 1999 respectively, represent the write-off of
in-process technologies associated with our acquisitions of Leda in fiscal 2000
and Gambit, Stanza, CoverMeter, and Apteq, in fiscal 1999. At the date of each
acquisition the projects associated with the IPRD efforts had not yet reached
technological feasibility and the research and development in process had no
alternative future uses. Accordingly, these amounts were expensed on the
respective acquisition dates of each of the acquired companies. (Also see Note
3, Business Combinations, of Notes to Synopsys' Consolidated Financial
Statements.)

Valuation of IPRD. We calculated amounts allocated to IPRD using
established valuation techniques in the high technology industry and expensed
such amounts in the quarter that each acquisition was consummated because
technological feasibility had not been achieved and no alternative future uses
had been identified. In each of the acquisitions that had associated significant
IPRD charges during fiscal 2000 and 1999, the valuation of IPRD was determined
as discussed in the next three paragraphs. Information specific to the
significant IPRD charges in 2000 and 1999 follows.

The value assigned to acquired in-process technology was determined by
identifying products under research in areas for which technological feasibility
had not been established. The value of in-process technology was then segmented
into two classifications: (i) in-process technology -- completed and (ii) in-
process technology -- to-be-completed, giving explicit consideration to the
value created by the research and development efforts of the acquired business
prior to the date of acquisition and to be created by Synopsys after the
acquisition. These value creation efforts were estimated by considering the
following major factors: (i) time-based data, (ii) cost-based data and (iii)
complexity-based data.

The value of the in-process technology was determined using a discounted
cash flow model similar to the income approach, focusing on the income-producing
capabilities of the in-process technologies. Under this approach, the value is
determined by estimating the revenue contribution generated by each of the
identified products within the classification segments. Revenue estimates were
based on (i) individual product revenues, (ii) anticipated growth rates (iii)
anticipated product development and introduction schedules (iv) product sales
cycles, and (v) the estimated life of a product's underlying technology. From
the revenue estimates, operating expense estimates, including costs of sales,
general and administrative, selling and marketing, income taxes and a use charge
for contributory assets, were deducted to arrive at operating income. Revenue
growth rates were estimated by management for each product and gave
consideration to relevant market sizes and growth factors, expected industry
trends, the anticipated nature and timing of new product introductions by us and
our competitors, individual product sales cycles, and the estimated life of each
product's underlying technology. Operating expense estimates reflect our
historical expense ratios. Additionally, these projects will require continued
research and development after they have reached a state of technological and
commercial feasibility. The resulting operating income stream was discounted to
reflect its present value at the date of the

24

acquisition. These estimates are subject to change, given the uncertainties of
the development process, and no assurance can be given that deviations from
these estimates will not occur or that we will realize any anticipated benefits
of the acquisition.

The rate used to discount the net cash flows from purchased in-process
technology is our weighted average cost of capital (WACC), taking into account
our required rates of return from investments in various areas of the
enterprise, and reflecting the inherent uncertainties in future revenue
estimates from technology investments including the uncertainty surrounding the
successful development of the acquired in-process technology, the useful life of
such technology, the profitability levels of such technology, if any, and the
uncertainty of technological advances, all of which are unknown at this time.

Gambit. In March 1999, the Company acquired Gambit. Upon consummation of
the Gambit acquisition, we immediately recognized expense of $13.9 million
representing the acquired in-process technology that had not yet reached
technological feasibility and had no alternative future use. At the date of the
acquisition, the principal in-process technologies identified were Gambit's
integrated circuit routing and clock tree synthesis (CTS) technologies, both of
which are related to the physical design of integrated circuits. For purposes of
valuing the IPRD in accordance with the methodology discussed above, the
following estimates were used: revenue growth ranging from 57% in year two to 9%
in year five; cost of sales -- 20% of revenue in each year; general and
administrative expenses -- 18% of revenue in each year; and sales and
marketing -- 21% of revenue in each year. In addition, it was assumed there
would be no expense reduction due to economic synergies as a result of the
acquisition. The rate used to discount the net cash flows from the Gambit
purchased in-process technology was 25%. The technologies were approximately 75%
complete at the acquisition date. The nature of the efforts to complete these
projects related, in varying degrees, to the completion of all planning,
designing, prototyping, verification, and testing activities that are necessary
to establish that the proposed technologies met their design specifications,
including functional, technical, and economic performance requirements. The
acquired in-process technologies were originally anticipated to become
commercially viable in fiscal 1999 and 2000. Expenditures to complete the
acquired in-process technologies were expected to total approximately $3.2
million.

Subsequent to the date of the acquisition, we determined that the
in-process technologies acquired would be more commercially viable if they were
integrated with our existing products and technologies in development. Our
decision to integrate the acquired in-process technologies rather than selling
them as stand alone products is the result of changes in technology in the
industry, development of our strategy for entering the market for physical
design software, and market forces. We have incurred research and development
expenses of approximately $8.4 million directly related to the acquired and
enhanced technologies. We introduced routing and CTS products integrating the
acquired in-process technology to a limited number of customers in fiscal 2001
and expect general release of these products in fiscal 2002. The anticipated
incremental revenue contribution from the enhanced technology and the related
costs including cost of sales and incremental general and administrative and
sales and marketing costs, are being evaluated based on current customer
analysis; however, we expect the revenue and the costs related to this product
to be consistent with the valuation assumptions noted above.

The risks associated with this research and development are still
considered high and no assurance can be made that these products will meet
market expectations. If these projects are not successfully developed, future
revenue, and profitability of the acquired Gambit business may be materially
adversely affected. Additionally, the value of other intangible assets acquired
may become impaired. As evidenced by its continued support for these projects,
management believes that we will successfully complete each of the major Gambit
research and development programs.

We obtained a second in-process routing technology from Gambit; this
technology has not been further developed except to the extent necessary to
service former Gambit customers using prior versions of the technology. The
post-acquisition research and development costs have not been materially in
excess of those anticipated at the acquisition date.

During fiscal 2000 and 1999, we made other acquisitions resulting in
aggregate IPRD charges of $1.7 million and $7.3 million, respectively, none of
which were individually material to the results of our
25

operations in the respective year. The fair value of the related IPRD was
determined in a manner substantially similar to that described for Gambit. The
risks associated with this acquired research and development are considered high
and no assurance can be made that these products will generate any benefit to us
or meet market expectations.

Other Income, Net. Other income, net was $83.8 million, $40.8 million and
$37.0 million, or 12%, 5% and 5% of total revenue in fiscal 2001, 2000 and 1999,
respectively. The increase for fiscal 2001 is due in part to an increase in
realized gains on investments, which were $55.3 million for fiscal 2001 as
compared to $13.0 million for fiscal 2000, in part to the receipt of rental
income of $8.6 million in fiscal 2001, as compared to zero for fiscal 2000 and
in part to the gain of $10.6 million on the sale of our silicon libraries
business to Artisan. These gains were partially offset by the write-down of
certain assets in our venture portfolio in the amount of $5.8 million for fiscal
2001 and a lower level of interest income in fiscal 2001 of $12.8 million
compared to $28.1 million in fiscal 2000. The decrease in interest income
primarily reflects our lower average cash balances, which resulted from the
continuation of our stock repurchase programs and the decision to grant extended
payment terms on more revenue contracts in fiscal 2001. Other income, net
increased from fiscal 1999 to fiscal 2000 from a higher mix of higher yield
taxable to tax-exempt investments in fiscal 2000. In addition, in fiscal 2000,
other income, net increased in comparison to fiscal 1999 due to gains realized
on sales of equity investments.

For fiscal 2002, we expect other income and expense to be between $27
million and $33 million, including approximately $16 million from the sale of
investments held by the Company.

During the year ended October 31, 2001, we determined that certain of the
assets held in our venture fund, with an aggregate value of $9.4 million, were
impaired, and that the impairment was other than temporary. Accordingly, we
recorded a charge of approximately $5.8 million to write down the carrying value
of the investments. The impairment charge is included in other income, net. The
impairment charge relates to certain investments in non-public companies and
represents management's estimate of the impairment incurred during the period as
a result of specific analysis of each investment, considering the activities of
and events occurring at each of the underlying portfolio companies during the
quarter. Our portfolio companies operate in industries that are rapidly evolving
and extremely competitive. For equity investments in non-public companies for
which there is not a market in which their value is readily determinable, we
review each investment for indicators of impairment on a quarterly basis based,
primarily on achievement of business plan objectives and current market
conditions, among other factors. The primary business plan objectives we
consider include, among others, those related to financial performance such as
achievement of planned financial results or completion of capital raising
activities, and those that are not primarily financial in nature such as the
introduction of technology or the hiring of key employees on a timely basis. If
it is determined that an impairment has occurred with respect to an investment
in a portfolio company, in the absence of quantitative valuation metrics,
management estimates the impairment and/or the net realizable value of the
portfolio investment based on public- and private-company market comparable
information and valuations completed for companies similar to our portfolio
companies.

Interest Rate Risk. Our exposure to market risk for changes in interest
rates relates primarily to our short-term investment portfolio. We do not use
derivative financial instruments for speculative or trading purposes with
respect to our cash and short-term investments. We place our investments in a
mix of tax-exempt and taxable instruments that meet high credit quality
standards, as specified in our investment policy. The policy also limits the
amount of credit exposure to any one issue, issuer and type of instrument. We do
not anticipate any material losses due to this risk with respect to our
investment portfolio.

26

The following table presents the carrying value and related
weighted-average after tax interest return for our investment portfolio at
October 31, 2001. The carrying value approximates fair value at that date. In
accordance with our investment policy, the weighted-average duration of the
Company's investment portfolio does not exceed one year.

Principal (Notional) Amounts in U.S. Dollars:

See Note 4, Financial Instruments, in the accompanying notes to
consolidated financial statements for additional information on investment
maturity dates, long-term debt and equity price risk related to the Company's
long-term investments.

Foreign Currency Risk. At the present time, we do not generally hedge
anticipated foreign currency cash flows but hedge only those currency exposures
associated with certain assets and liabilities denominated in nonfunctional
currencies. Hedging activities undertaken are intended to offset the impact of
currency fluctuations on these balances. The success of this activity depends
upon estimates of balances denominated in various currencies and foreign
currency fluctuations. At October 31, 2001, we have forward contracts for the
sale and purchase of foreign currencies with a notional value expressed in U.S.
dollars of $72.2 million. We do not anticipate any material adverse effect on
our consolidated financial position, results of operations, or cash flows
resulting from the use of these instruments. There can be no assurance that
these hedging transactions will be effective in the future.

The following table provides information about our foreign exchange forward
contracts at October 31, 2001. Due to the short-term nature of these contracts,
the amount in U.S. dollars approximates the fair value of the contract at
October 31, 2001. These forward contracts mature in approximately thirty days.

SHORT-TERM FORWARD CONTRACTS TO SELL AND BUY FOREIGN
CURRENCIES IN U.S. DOLLARS

The unrealized gains/losses on the outstanding forward contracts at October
31, 2001 are immaterial. The realized gain/loss on these contracts as they
matured were not material to our consolidated financial position, results of
operations, or cash flows for the periods presented.

Derivative Financial Instruments. On November 1, 2000, we adopted
Statement of Financial Accounting Standards No. 133, Accounting for Derivative
Instruments and Hedging Activities (SFAS 133), as amended. SFAS 133 establishes
accounting and reporting standards for derivative instruments and hedging
activities. SFAS 133 requires that all derivatives be recognized as either
assets or liabilities at fair value. Derivatives that are not designated as
hedging instruments are adjusted to fair value through earnings. If the
27

derivative is designated as a hedging instrument, depending on the nature of the
exposure being hedged, changes in fair value will either be offset against the
change in fair value of the hedged asset, liability, or firm commitment through
earnings, or recognized in other comprehensive income until the hedged
anticipated transaction affects earnings. The ineffective portion of the hedge
is recognized in earnings immediately. Upon adoption of SFAS 133, the cumulative
transition adjustment was insignificant. We do not believe that ongoing
application of SFAS 133 will significantly alter our hedging strategies.
However, its application may increase the volatility of other income and expense
and other comprehensive income. Apart from our foreign currency hedging and
forward sales of certain equity investments, we do not use derivative financial
instruments. In particular, we do not use derivative financial instruments for
speculative or trading purposes.

European Monetary Union. In January 1999, a new currency called the
European Monetary Unit, or "Euro," was introduced in certain Economic and
Monetary Union (EMU) countries. During 2002, all EMU countries are expected to
be operating with the Euro as their single currency. We have assessed the impact
the Euro formation will have on our internal systems and the sale of our
products. Our international sales are based primarily in U.S. dollars which is
not subject to the Euro conversion. While we do have some sales and operating
expenses denominated in the European Currency Unit, this currency is
successfully being converted in the market to the new Euro at parity. In
addition, we upgraded our internal computer systems to convert the European
currencies to the Euro. We expect no material adverse effect on our business,
financial condition, and results of operations due to the conversion to the
Euro.

PROPOSED ACQUISITION OF IKOS SYSTEMS, INC.

On July 2, 2001, we entered into an Agreement and Plan of Merger and
Reorganization (the "Merger Agreement") with IKOS Systems, Inc. (IKOS). The
Merger Agreement provides for the acquisition of all outstanding shares of IKOS
common stock by Synopsys. The merger is expected to be completed in August 2002,
however, under certain circumstances the merger may close prior to June 30,
2002. We will account for the merger under the purchase method of accounting.

Upon completion of the merger, holders of IKOS common stock will be
entitled to receive Synopsys common stock with a value between $6 and $20 in
exchange for each share of IKOS common stock owned at the time of completion of
the merger. The exact amount per share will depend upon the financial
performance of IKOS during the 12-month measurement period ending June 30, 2002
and will be calculated based on formulas contained in the Merger Agreement. The
formulas contained in the Merger Agreement provide for proportionate increases
in the purchase price per IKOS share as IKOS' revenue, revenue plus change in
backlog or profit (loss) before tax (PBT) (each as defined in the Merger
Agreement) increase. If the merger closes before June 30, 2002, the Merger
Agreement provides for holders of IKOS common stock on the closing date to
receive Synopsys common stock with a value of $15 for each share of IKOS common
stock, regardless of IKOS' financial performance up to the date of closing.
Regardless of when the merger closes, the purchase price per IKOS share is
subject to reduction if the number of outstanding IKOS shares and options
immediately before the effective time of the merger exceeds an agreed-upon
level. However, the purchase price per IKOS share will not be less than $6.

The merger is subject to certain conditions, including IKOS achieving
revenue of at least $50 million and losses before tax not exceeding $10 million
during the twelve-month period ending June 30, 2002, expiration or termination
of a Synopsys emulation non-compete agreement, IKOS stockholder approval,
retention of certain employees, compliance with regulatory requirements and
customary closing conditions.

The actual number of shares of Synopsys common stock to be issued in the
merger and the aggregate purchase price at the effective time of the merger
cannot be determined until IKOS' financial performance during the measurement
period is calculated and until the average last sale price of Synopsys common
stock during the applicable pre-closing pricing period is determined.

On December 7, 2001, Mentor Graphics Corporation commenced a tender offer
for all shares of IKOS common stock. The offer is subject to numerous
conditions, including the termination of the Merger Agreement. The purported
terms and conditions of the offer are set forth in an offer to purchase filed by
Mentor as part of a Schedule TO with the Securities and Exchange Commission on
December 7, 2001 and in
28

certain amendments thereto filed by Mentor with the SEC thereafter. IKOS'
response to the tender offer is set forth in a Schedule 14D-9 filed by IKOS with
the Securities and Exchange Commission on December 20, 2001 and in certain
amendments thereto filed by IKOS with the SEC thereafter. Litigation relating to
IKOS is discussed above under Item 3.

SUBSEQUENT EVENT -- PROPOSED ACQUISITION OF AVANT! CORPORATION

On December 3, 2001, we entered into an Agreement and Plan of Merger with
Avant! Corporation (Avant!) by which Avant! will merge with and into a wholly
owned subsidiary of Synopsys. We will account for the merger under the purchase
method of accounting.

Upon completion of the merger, holders of Avant! common stock will be
entitled to receive 0.371 of a share of Synopsys common stock (including the
associated preferred stock rights) in exchange for each share of Avant! common
stock (the exchange ratio) owned at the time of completion of the merger. The
exchange ratio will be proportionately adjusted for any stock split, stock
dividend, reorganization or similar change in Avant! common stock or Synopsys
common stock. Avant! stockholders will receive cash based on the market price of
Synopsys common stock in lieu of any fractional shares to which they might
otherwise be entitled. The merger is subject to certain conditions, including
approval by the Avant! stockholders of the merger and the Agreement and Plan of
Merger, approval by Synopsys stockholders of the issuance of Synopsys common
stock in the merger, compliance with regulatory requirements and customary
closing conditions.

The actual number of shares of Synopsys common stock to be issued in the
proposed merger and the dollar value at the effective time of the merger cannot
be determined until the closing date of the merger.

EFFECT OF NEW ACCOUNTING STANDARDS

In July 2001, the Financial Accounting Standards Board issued Statements of
Financial Accounting Standards No. 141, Business Combinations, (SFAS 141) and
No. 142, Goodwill and Other Intangible Assets (SFAS 142). SFAS 141 requires that
the purchase method of accounting be used for all business combinations
initiated after June 30, 2001 and specifies criteria intangible assets acquired
in a purchase method business combination must meet to be recognized apart from
goodwill. SFAS 142 requires that goodwill and intangible assets with indefinite
useful lives no longer be amortized, but instead be tested for impairment at
least annually in accordance with the provisions of SFAS 142.

We adopted the provisions of SFAS 141 effective July 1, 2001. Under SFAS
141, goodwill and intangible assets determined to have indefinite useful lives
acquired in a purchase business combination completed after June 30, 2001, but
before SFAS 142 is adopted will not be amortized, but will continue to be
evaluated for impairment in accordance with SFAS 121. Goodwill and intangible
assets acquired in business combinations completed before July 1, 2001 will
continue to be amortized and tested for impairment in accordance with current
accounting guidance until the date of adoption of SFAS 142.

Upon adoption of SFAS 142, we will evaluate existing intangible assets and
goodwill that were acquired in prior purchase business combinations, and make
any necessary reclassifications in order to conform with the new criteria in
SFAS 142 for recognition of intangible assets apart from goodwill. Upon adoption
of SFAS 142, we will be required to reassess the useful lives and residual
values of all intangible assets acquired, and make any necessary amortization
period adjustments. In addition, we will be required to test intangible assets
with indefinite useful lives and goodwill for impairment in accordance with the
provisions of SFAS 142 within the six-month period following adoption. Any
impairment loss will be measured as of the date of adoption and recognized as
the cumulative effect of a change in accounting principle. Any subsequent
impairment losses will be included in operating activities.

We expect to adopt SFAS 142 on November 1, 2002. As of October 31, 2001,
unamortized goodwill is $35.1 million, which will no long be amortized
subsequent to the adoption of SFAS 142. Related goodwill amortization expense
for fiscal 2001, 2000 and 1999 is $17.0 million, $15.1 million and $7.9 million,
respectively. Amortization expense for the one-month transition period ended
October 31, 1999 was $1.2 million. Because of the extensive effort needed to
comply with adopting SFAS 141 and 142, it is not

29

practicable to reasonably estimate the impact of adopting these Statements on
our financial statements at the date of this report, including whether we will
be required to recognize any transitional impairment losses.

LIQUIDITY AND CAPITAL RESOURCES

Cash, cash equivalents and short-term investments were $476.4 million at
October 31, 2001, an increase of $43.2 million, or 10%, from October 31, 2000.
Cash provided by operating activities was $295.8 million for fiscal 2001
compared to $152.7 million for fiscal 2000.

Cash provided by investing activities was $61.8 million in fiscal 2001
compared to $45.6 million provided by investing activities during fiscal 2000.
The increase in cash provided by investing activities of $16.2 million is due
primarily to net proceeds from the sale of short- and long-term investments
totaling $141.5 million for fiscal 2001 as compared to net proceeds of
investments totaling $125.8 million for fiscal 2000. The cash received from the
sales of investments during fiscal 2001 was primarily used to purchase treasury
stock. Capital expenditures totaled $82.5 million during fiscal 2001 as we
continue to invest in fixed assets, primarily related to construction of our
Oregon facilities and computing equipment to upgrade our internal engineering
and enterprise application systems.

We used $233.0 million in net cash for financing activities during 2001
compared to $351.5 in fiscal 2000. The primary financing uses of cash during
2001 were the repurchase of 6.6 million shares of common stock for approximately
$50 per share and payments on debt obligations totaling $6.5 million. Financing
proceeds from the sale of shares pursuant to our employee stock plans during
fiscal 2001 were $105.4 million compared to $59.5 million during fiscal 2000.

Accounts receivable remained relatively flat from $146.9 million at October
31, 2000 to $146.3 million at October 31, 2001. Days sales outstanding, which is
calculated based on revenues for the most recent quarter and accounts receivable
as of the balance sheet decreased to 73 days as of October 31, 2001 from 99 days
at October 31, 2000. The decrease in days sales outstanding is the result of the
change in our license model resulting in scheduled billings over the life of the
contract for TSLs whereas, under the prior form of time-based licenses the
contract amount was typically billed up-front.

We believe that our current cash, cash equivalents, short-term investments
and cash generated from operations will satisfy our business requirements for at
least the next twelve months.

FACTORS THAT MAY AFFECT FUTURE RESULTS

Weakness in the semiconductor and electronics businesses may negatively
impact Synopsys' business. Synopsys' business depends on the semiconductor and
electronics businesses, which in 2001 experienced their sharpest decline in
orders and revenue in over 20 years. Purchases of our products are largely
dependent upon the commencement of new design projects by semiconductor
manufacturers and their customers, the number of design engineers and the
increasing complexity of designs.

During 2001 many semi-conductor and electronic companies cancelled or
deferred design projects and reduced their design engineering staffs, which
respectively impacted our orders and revenues and particularly our professional
services business. Demand for our products and services may also be affected by
mergers in the semiconductor and systems industries, which may reduce the
aggregate level of purchases of our products and services by the combined
company. Continuation or worsening of the current conditions in the
semiconductor industry, and continued consolidation among our customers, all
could have a material adverse effect on our business, financial condition and
results of operations.

Synopsys' revenue and earnings may fluctuate. Many factors affect our
revenue and earnings, which makes it difficult to achieve predictable revenue
and earnings growth. Among these factors are customer product and service
demand, product license terms, and the timing of revenue recognition on products
and

30

services sold. The following specific factors could affect our revenue and
earnings in a particular quarter or over several quarterly or annual periods:

- Our products are complex, and before buying them customers spend a great
deal of time reviewing and testing them. Our customers' evaluation and
purchase cycles do not necessarily match our quarterly periods. In the
past, we have received a disproportionate volume of orders in the last
week of a quarter. In addition, a large proportion of our business is
attributable to our largest customers. As a result, if any order, and
especially a large order, is delayed beyond the end of a fiscal period,
our orders for that period could be below our plan and our revenue could
be below any targets we may have published.

- Accounting rules determine when revenue is recognized on our orders, and
therefore impact how much revenue we will report in any given fiscal
period. The authoritative literature under which Synopsys recognizes
revenue has been, and is expected to continue to be, the subject of much
interpretative guidance. In general, after the adoption of TSLs in the
fourth quarter of fiscal 2000, most orders for our products and services
yield revenue over multiple quarters or years or upon completion of
performance rather than at the time the product is shipped. For any given
order, however, the specific terms agreed to with a customer may have the
effect of requiring deferral or acceleration of revenue in whole or in
part. Therefore, for any given fiscal period it is possible for us to
fall short in our revenue and/or earnings plan even while orders and
backlog remain on plan or, conversely, to meet or exceed our revenue
and/or earnings plan because of backlog and deferred revenue and the mix
of orders during authorization period, while aggregate orders are under
plan.

- Our revenue and earnings targets are based, in part, upon an assumption
that we will achieve a license mix of perpetual licenses (on which
revenue is generally recognized in the quarter shipped) and TSLs on which
revenue is recognized over the term of license that includes 15% to 25%
perpetual licenses. If we are unable to achieve a mix in this range our
ability to achieve short-term or long-term revenue and/or earnings
targets may be impaired.

Synopsys may not be able to successfully compete in the EDA industry. The
EDA industry is highly competitive. We compete against other EDA vendors, and
with customers' internally developed design tools and internal design
capabilities for a share of the overall EDA budgets of our potential customers.
In general, competition is based on product quality and features, post-sale
support, price and, as discussed below, the ability to offer a complete design
flow. Our competitors include companies that offer a broad range of products and
services, such as Cadence Design Systems, Inc., Avant! and Mentor Graphics
Corporation, as well as companies, including numerous recently-public and
start-up companies, that offer products focused on a discrete phase of the
integrated circuit design process. In certain situations, Synopsys' competitors
have been offering aggressive discounts on certain of their products, in
particular simulation and synthesis products. As a result, average prices for
these products may fall.

Technology advances and customer requirements continue to fuel a change in
the nature of competition among EDA vendors, which could hurt Synopsys' ability
to compete. Increasingly, EDA companies compete on the basis of "design flows"
involving integrated logic and physical design products (referred to as
"physical synthesis" products) rather than on the basis of individual "point"
tools performing a discrete phase of the design process. The need to offer
physical synthesis products will become increasingly important as ICs grow more
complex. Our physical synthesis products compete principally with products from
Cadence and Magma Design Automation, both of which include more complete
physical design capabilities. We are working on completing our design flow. In
June we announced two physical design products, and in December 2001 we
announced the Avant! merger. However, there can be no guarantee that we will be
able to offer a competitive complete design flow to customers as a result of
these efforts or the proposed Avant! merger. If we are unsuccessful in
developing a complete design flow on a timely basis, if the Avant! merger is not
completed or if we are unsuccessful in convincing customers to adopt our
integrated design flow, our competitive position could be significantly
weakened.

Synopsys' revenue growth depends on new and non-synthesis products, which
may not be accepted in the marketplace. Historically, much of our growth has
been attributable to the strength of our logic synthesis products. Our DC Family
of products accounted for 32% of revenue in fiscal 2001. We believe that orders
and
31

revenue for our flagship logic synthesis product, Design Compiler, and the DC
Family have peaked. Over the long term, we expect the contribution from the DC
Family to decline as our customers transition from DC Family products to
Physical Synthesis products. In order to meet our revenue plan, aggregate
revenues products other than the DC family and from professional services must
grow faster than our overall revenue growth target. If such revenue growth fails
to meet our goals, it will be difficult for us to meet our overall revenue or
earnings targets.

In order to sustain revenue growth over the long term, we will have to
enhance our existing products and introduce new products that are accepted by a
broad range of customers and to continue the growth in our consulting services
business. Product success is difficult to predict. The introduction of new
products and growth of a market for such products cannot be assured. In the past
we, like all companies, have introduced new products that have failed to meet
our revenue expectations. Expanding revenue from consulting services may be
difficult in the current economic environment. It will require us to continue to
develop effective management controls on bidding and executing on consulting
engagements. Increasing consulting orders and revenue while maintaining an
adequate level of profit can be difficult. There can be no assurance that we
will be successful in expanding revenue from existing or new products at the
desired rate or in expanding our services business, and the failure to do so
would have a material adverse effect on our business, financial condition and
results of operations.

Businesses that Synopsys has acquired or that Synopsys may acquire in the
future, including IKOS and Avant!, may not perform as projected. We have
acquired or merged with a number of companies in recent years, and as part of
our efforts to increase revenue and expand our product and services offerings we
may acquire additional companies. For example, in July 2001, Synopsys announced
the IKOS merger and in December 2001, Synopsys announced the Avant! merger. In
addition to direct costs, acquisitions pose a number of risks, including
potential dilution of earnings per share, problems in integrating the acquired
products and employees into our business, the failure to realize expected
synergies or cost savings, the failure of acquired products to achieve projected
sales, the drain on management time for acquisition-related activities, adverse
effects on customer buying patterns and assumption of unknown liabilities. While
we attempt to review proposed acquisitions carefully and negotiate terms that
are favorable to us, there is no assurance that any acquisition will have a
positive effect on our performance.

Stagnation of international economies would adversely affect our
performance. During fiscal 2001, 37% of our revenue was derived from outside
North America, as compared to 42% during fiscal 2000. International sales are
vulnerable to regional or worldwide economic or political conditions and to
changes in foreign currency exchange rates. Economic conditions in Europe, Japan
and the rest of Asia have deteriorated in recent quarters, and the longer this
weakness persists the more likely it is to have a negative impact on our
business. In particular, a number of our largest European customers are in the
telecommunications equipment business, which has weakened considerably this
year. The Japanese economy has been stagnant for several years, and may now be
entering a recession. If the Japanese economy remains weak, revenue and orders
from Japan, and perhaps the rest of Asia, could be adversely affected. In
addition, the yen-dollar and euro-dollar exchange rates remain subject to
unpredictable fluctuations. Weakness of the yen could adversely affect revenue
and orders from Japan during future quarters. Asian countries other than Japan
also have experienced economic and currency problems in recent years, and in
most cases they have not fully recovered. If such conditions persist or worsen,
orders and revenues from the Asia Pacific region would be adversely affected.

Synopsys' success depends on recruiting and retaining key employees. Our
success is dependent on technical and other contributions of key employees. We
participate in a dynamic industry, and our headquarters is in Silicon Valley,
where, despite recent economic conditions, skilled technical, sales and
management employees are in high demand. There are a limited number of qualified
EDA and IC design engineers, and the competition for such individuals is
intense. Despite economic conditions, start-up activity in EDA remains
significant, and a number of EDA companies have gone public in the past year.
Experience at Synopsys is highly valued in the EDA industry and the general
electronics industry, and our employees are recruited aggressively by our
competitors and by start-up companies in many industries. In the past, we have
experienced, and may continue to experience, significant employee turnover.
There can be no assurance that we can continue to recruit and retain the
technical and managerial personnel we need to run our business.
32

Failure to do so could have a material adverse effect on our business, financial
condition and results of operations.

Synopsys is dependent on its proprietary technology. Our success is
dependent, in part, upon our proprietary technology and other intellectual
property rights. We rely on agreements with customers, employees and others, and
intellectual property laws, to protect our proprietary technology. There can be
no assurance that these agreements will not be breached, that we would have
adequate remedies for any breach or that our trade secrets will not otherwise
become known or be independently developed by competitors. Moreover, effective
intellectual property protection may be unavailable or limited in certain
foreign countries. Failure to obtain or maintain appropriate patent, copyright
or trade secret protection, for any reason, could have a material adverse effect
on our business, financial condition and results of operations. In addition,
there can be no assurance that infringement claims will not be asserted against
us and any such claims could require us to enter into royalty arrangements or
result in costly and time-consuming litigation or could subject us to damages or
injunctions restricting our sale of products or could require us to redesign
products.

Our operating expenses do not fluctuate proportionately with fluctuations
in revenues. Our operating expenses are based in part on our expectations of
future revenue, and expense levels are generally committed in advance of
revenue. Since only a small portion of our expenses varies with revenue, a
shortfall in revenue translates directly into a reduction in net income. For the
first quarter of fiscal 2002, our target for total expenses is $162 to $166
million. If we are unsuccessful in generating anticipated revenue or maintaining
expenses within this range, however, our business, financial condition and
results of operations could be materially adversely affected.

Synopsys has adopted anti-takeover provisions, which may have the effect of
delaying or preventing changes of control or management. We have adopted a
number of provisions that could have anti-takeover effects. Our board of
directors has adopted a Preferred Shares Rights Plan, commonly referred to as a
"poison pill." In addition, our board of directors has the authority, without
further action by its stockholders, to issue additional shares of Common Stock
and to fix the rights and preferences of, and to issue authorized but
undesignated shares of Preferred Stock. These and other provisions of Synopsys'
Restated Certificate of Incorporation and Bylaws and the Delaware General
Corporation Law may have the effect of deterring hostile takeovers or delaying
or preventing changes in control or management of Synopsys, including
transactions in which the stockholders of Synopsys might otherwise receive a
premium for their shares over then current market prices.

Synopsys is subject to changes in financial accounting standards, which may
affect our reported revenue, or the way we conduct business. We prepare our
financial statements in conformity with accounting principles generally accepted
in the United States of America (GAAP). GAAP are subject to interpretation by
the Financial Accounting Standards Board, the American Institute of Certified
Public Accountants (AICPA), the SEC and various bodies appointed by these
organizations to interpret existing rules and create new accounting policies. In
particular, a task force of the Accounting Standards Executive Committee, a
subgroup of the AICPA, meets on a quarterly basis to review various issues
arising under the existing software revenue recognition rules, and
interpretations of these rules. Additional interpretations issued by the task
force may have an adverse effect on how we report revenue or on the way we
conduct our business in the future.

Synopsys is subject to a number of special risks as a result of its planned
acquisition of Avant! As a result of entering into an agreement to acquire
Avant!, Synopsys is subject to additional risks and uncertainties, including the
following:

- Synopsys May Fail To Integrate Successfully Synopsys' and Avant!'s
Operations. As a Result, Synopsys and Avant! May Not Achieve the
Anticipated Benefits of the Avant! Merger. Synopsys and Avant! expect
that the Avant! merger will result in benefits to Synopsys and Avant!,
including the offering of a complete and, over time, integrated set of
software products for the design and verification of complex integrated
circuits to its customers. However, the expected benefits may not be
fully realized. Achieving the benefits of the Avant! merger will depend
on many factors, including the successful and timely integration of the
products, technology and sales operations of the two companies following
the completion of the Avant! merger. These integration efforts may be
difficult and time
33

consuming, especially considering the highly technical and complex nature
of each company's products. Failure to achieve a successful and timely
integration of their respective products and sales operations could
result in the loss of existing or potential customers of Synopsys and
Avant! and could have a material adverse effect on the business,
financial condition and results of operations of Synopsys and its
subsidiaries, including Avant!, and on the price of Synopsys common
shares. Integration efforts between the two companies will also divert
significant management attention and resources. This diversion of
attention and resources could have an adverse effect on Synopsys during
such transition period.

- Avant! Has Been Required To Pay Substantial Amounts in the Recent
Resolution of Criminal and Civil Litigation, and Might Be Required To Pay
Substantial Additional Amounts under Pending Lawsuits. During 2001,
Avant! paid approximately $237 million in fines and restitution arising
out of charges brought by the District Attorney of Santa Clara County
(the Santa Clara criminal action). Avant! does not expect any further
proceedings in the Santa Clara criminal action and, therefore, does not
expect to incur any additional litigation costs, fines or other payments
in such criminal action. Avant! and its subsidiaries are engaged in a
number of material civil litigation matters, including an action brought
by Cadence Design Systems, Inc. in December 1995 (Avant!/Cadence
litigation). The Avant!/Cadence litigation generally arises out of the
same set of facts that were the subject of the Santa Clara criminal
action. Avant! believes it has defenses to all of Cadence's claims and
intends to defend itself vigorously. Should Cadence ultimately succeed in
the prosecution of its claims, however, Avant! could be required to pay
substantial monetary damages to Cadence. Some or all of these damages may
be offset by the amounts paid to Cadence as restitution in the Santa
Clara criminal action.

Injunctions entered in 1997 and 1998 enjoined Avant! from marketing its
early place and route products, ArcCell and Aquarius, based on a judicial
determination that they incorporated portions of Cadence's Design
Framework II source code (DFII). The injunctions also prohibit Avant! from
possessing, using, selling or licensing any product or work copied or
derived from DFII and directly or indirectly marketing, selling, leasing,
licensing, copying or transferring any of the ArcCell or Aquarius
products. The DFII code is not incorporated in any current Avant! product.
Although Cadence has not made a claim in the Avant!/Cadence litigation
against any current Avant! product, including its Apollo and Astro place
and route products, and has not introduced any evidence that any such
product infringes Cadence's intellectual property rights, Avant! expects
Cadence to assert such claims. Avant! believes it would have defenses to
any such claims and Avant! would defend itself vigorously.

Nonetheless, should Cadence be successful at proving that any past or
then-current Avant! product incorporated intellectual property
misappropriated from Cadence, Avant! could be permanently enjoined from
further use of such intellectual property, which might require
modification to existing products and/or suspension of the sale of such
products until such Cadence intellectual property was removed. The
Avant!/Cadence litigation, other pending Avant! litigation and other
potential litigation, regardless of the outcome, may continue to result in
substantial costs and expenses and significant diversion of effort by
management, and may negatively impact relationships with customers. An
adverse result in any of these litigation matters could seriously harm
Avant!'s and, after the proposed Avant! merger, Synopsys' business,
financial condition and results of operations.

- The Insurer Under the Litigation Protection Insurance relating to the
Avant!/Cadence Litigation May Be Prevented from Paying for Certain Losses
on the Grounds that such Payment Violates Public Policy. Synopsys has
agreed to enter into a policy with an insurance company rated AAA by
Standard & Poors. Under the policy, insurance will be provided to pay
Synopsys an amount equaling certain compensatory, exemplary and punitive
damages, penalties and fines, and attorneys' fees arising out of the
Avant!/Cadence litigation (covered loss). The policy does not provide
coverage for litigation other than the Avant!/Cadence litigation. In
exchange for a binding fee of $10 million paid by Synopsys, the insurer
has issued a legally binding commitment to provide the coverage,
effective following the closing of the Avant! merger. Such fee is
refundable in part to Synopsys in the event the Avant! merger is not
completed. Otherwise, the fee will be credited against the premium to
make the insurance effective,
34

which must be paid by Synopsys to the insurer on or about the closing of
the Avant! merger. In return for a premium of $335 million, including the
binding fee, the insurer will be obligated to pay covered loss up to a
limit of liability equaling (a) $500 million plus (b) interest accruing
at the fixed rate of 2%, compounded semi-annually, on $250 million. The
policy will expire upon a final judgment or settlement of the
Avant!/Cadence litigation or any earlier date upon Synopsys' election.
Upon such expiration, Synopsys will be entitled to a payment equal to
$250 million plus interest calculated as set forth above less any loss
paid under the policy.

Certain of the potential losses relating to the Avant!/Cadence litigation
that are covered by the terms of the litigation protection insurance
obtained by Synopsys with respect to that litigation may arise from
exemplary and punitive damages, fines and penalties. In some
jurisdictions, it may be against public policy to provide insurance for
willful acts, punitive damages or similar claims. This could potentially
affect the validity of certain elements of the policy. The legal agreement
governing the arrangement will be governed by the laws of the State of
Delaware. Synopsys believes that the arrangement will be enforceable in
Delaware, but there can be no assurance in this regard. To the extent the
insurer is prevented from paying certain losses on grounds of public
policy that would otherwise be covered by the insurance, coverage will be
unavailable for that portion of the losses and the insurer may be
obligated to refund a portion of the premium to Synopsys.

- Whether or Not the Avant! Merger is Completed, the Announcement of the
Proposed Avant! Merger May Cause Disruptions in the Business of Synopsys,
Which Could Have Material Adverse Effects on the Business and Operations
of Synopsys. Whether or not the proposed Avant! merger is completed,
Synopsys' customers, in response to the announcement of the proposed
Avant! merger, may delay or defer decisions, which could have a material
adverse effect on the business of Synopsys. Similarly, current and
prospective Synopsys employees may experience uncertainty about their
future roles with Synopsys. This may adversely affect Synopsys' ability
to attract and retain key management, sales, marketing and technical
personnel. The extent of this adverse effect could depend on the length
of time prior to completion of the proposed Avant! merger or termination
of the merger agreement between Synopsys and Avant!.

- Failure to Complete the Avant! Merger Could Negatively Impact Synopsys
Stock Price, Future Business and Operations. If the Avant! merger is not
completed for any reason, Synopsys may be subject to a number of material
risks, including the following: Synopsys may face difficulties in
attracting strategic customers and partners who were expecting to use the
integrated product suite proposed to be offered by the merged company, to
assist in the development of new products by the separate companies; and
certain costs relating to the proposed Avant! merger, such as legal,
accounting, financial advisor and printing fees, must be paid even if the
proposed Avant! merger is not completed.

- Following the Merger, Synopsys Will Not Have Control Over the
Avant!/Cadence Litigation or the Authority to Settle the Avant!/Cadence
Litigation except in Limited Circumstances. Under the terms of the
litigation protection insurance obtained by Synopsys with respect to the
Avant!/Cadence litigation described above, which will become effective
immediately following the merger, the insurer has the right to exercise
full control over the defense of the Avant!/Cadence litigation, including
both the strategy and tactics to be employed. Further, the insurer has
the right to exclusively control the negotiation, discussion and terms of
any proposed settlement, except that Synopsys retains the right to settle
the Avant!/Cadence litigation, with the consent of the insurer, for up to
$250 million plus accruing interest less certain costs. Therefore,
following the merger, Synopsys will have a severely limited ability to
control any risks associated with, and the timing related to, any
liabilities resulting from the Avant!/Cadence litigation.

35

ITEM 7A. QUANTITATIVE AND QUALITATIVE DISCLOSURE ABOUT MARKET RISK

Information relating to quantitative and qualitative disclosure about
market risk is set forth in Synopsys' 2001 Annual Report on Form 10-K under the
captions "Interest Rate Risk" and "Foreign Currency Risk" in Management's
Discussion and Analysis of Financial Condition and Results of Operations, and
"Foreign Exchange Hedging" in Note 4 of Synopsys' Notes to Consolidated
Financial Statements.

36

ITEM 8. FINANCIAL STATEMENTS AND SUPPLEMENTARY DATA

REPORT OF KPMG LLP, INDEPENDENT AUDITORS

To The Board of Directors and
Shareholders of Synopsys, Inc.:

We have audited the accompanying consolidated balance sheets of Synopsys,
Inc. and subsidiaries as of October 31, 2001 and 2000, and the related
consolidated statements of operations, stockholders' equity and comprehensive
income and cash flows for each of the years in the two-year period ended October
31, 2001, the one-month period ended October 31, 1999 and the year ended
September 30, 1999. These consolidated financial statements are the
responsibility of the Company's management. Our responsibility is to express an
opinion on these consolidated financial statements based on our audits.

We conducted our audits in accordance with auditing standards generally
accepted in the United States of America. Those standards require that we plan
and perform the audit to obtain reasonable assurance about whether the financial
statements are free of material misstatement. An audit includes examining, on a
test basis, evidence supporting the amounts and disclosures in the financial
statements. An audit also includes assessing the accounting principles used and
significant estimates made by management, as well as evaluating the overall
financial statement presentation. We believe that our audits provide a
reasonable basis for our opinion.

In our opinion, the consolidated financial statements referred to above
present fairly, in all material respects, the financial position of Synopsys,
Inc. and subsidiaries as of October 31, 2001 and 2000, and the results of their
operations and their cash flows for each of the years in the two-year period
ended October 31, 2001, the one-month period ended October 31, 1999 and the year
ended September 30, 1999 in conformity with accounting principles generally
accepted in the United States of America.

Mountain View, California
November 20, 2001, except for Notes 9 and 11
which are as of December 20, 2001

37

SYNOPSYS, INC.

CONSOLIDATED BALANCE SHEETS

See accompanying notes to consolidated financial statements.
38

SYNOPSYS, INC.

CONSOLIDATED STATEMENTS OF OPERATIONS

See accompanying notes to consolidated financial statements.
39

SYNOPSYS, INC.
CONSOLIDATED STATEMENTS OF STOCKHOLDERS' EQUITY AND COMPREHENSIVE INCOME

See accompanying notes to the consolidated financial statements.

40

SYNOPSYS, INC.

CONSOLIDATED STATEMENTS OF CASH FLOWS

See accompanying notes to consolidated financial statements.
41

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS

NOTE 1. DESCRIPTION OF BUSINESS

Synopsys, Inc. (Synopsys or the Company) is a leading supplier of EDA
software to the global electronics industry. The Company develops, markets, and
supports a wide range of integrated circuit (IC) design products that are used
by designers of advanced ICs, including system-on-a-chip ICs, and the electronic
systems (such as computers, cell phones, and internet routers) that use such
ICs, to automate significant portions of their design process. ICs are
distinguished by the speed at which they run, their area, the amount of power
they consume and their cost of production. Synopsys' products offer its
customers the opportunity to design ICs that are optimized for speed, area,
power consumption and production cost, while reducing overall design time. The
Company also provides consulting services to help its customers improve their IC
designs and, where requested, to assist them with their IC designs, as well as
training and support services.

NOTE 2. SUMMARY OF SIGNIFICANT ACCOUNTING POLICIES

Fiscal Year End. The Company has a fiscal year that ends on the Saturday
nearest October 31. Fiscal 1999 and 2000 were 52-week years and fiscal 2001 is a
53-week year. Fiscal 2002 will be a 52-week year. Prior to fiscal 2000,
Synopsys' fiscal year ended on the Saturday nearest to September 30. The period
from October 1, 1999 through October 31, 1999 is a transition period. For
presentation purposes, the consolidated financial statements and notes refer to
the calendar month end.

Principles of Consolidation. The consolidated financial statements include
the accounts of the Company and all of its subsidiaries. All significant
intercompany accounts and transactions have been eliminated.

Use of Estimates. The preparation of financial statements in conformity
with accounting principles generally accepted in the United States of America
requires management to make estimates and assumptions that affect the amounts
recorded in the financial statements and accompanying notes. Actual amounts
could differ from these estimates.

Cash Equivalents and Short-Term Investments. The Company classifies
investments with original maturities of three months or less when acquired as
cash equivalents. All of the Company's cash equivalents and short-term
investments are classified as available-for-sale and are reported at fair value,
with unrealized gains and losses included in stockholders' equity as a component
of accumulated other comprehensive income, net of tax, if any. The fair value of
short-term investments is determined based on quoted market prices. The cost of
securities sold is based on the specific identification method and realized
gains and losses are included in other income, net. The Company has cash
equivalents and investments with various high quality institutions and, by
policy, limits the amount of credit exposure to any one institution.

Concentration of Credit Risk. The Company sells its products worldwide
primarily to customers in the semiconductor industry. The Company performs
on-going credit evaluations of its customers' financial condition and generally
does not require collateral. The Company maintains reserves for potential credit
losses, and such losses have been within management's expectations and have not
been material in any year.

Fair Values of Financial Instruments. The fair value of the Company's
cash, accounts receivable, long-term investments, forward contracts relating to
certain investments in equity securities, accounts payable, long-term debt and
foreign currency contracts, approximates the carrying amount, which is the
amount for which the instrument could be exchanged in a current transaction
between willing parties.

Factored Accounts Receivable. As of October 31, 2000, October 31, 1999 and
September 30, 1999, the Company sold approximately $5.3 million, $21.8 million
and $22.8 million, respectively, of its accounts receivable to a financial
institution, subject to limited repurchase obligations in the case of certain
customer defaults. The Company has not incurred any material losses due to the
limited repurchase obligations. No amounts subject to repurchase remain
outstanding at October 31, 2001.

42

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

Foreign Currency Translation. The functional currency of each of the
Company's international subsidiaries is the foreign subsidiary's local currency.
Assets and liabilities of the Company's international operations are translated
into U.S. dollars at exchange rates in effect at the balance sheet date. Income
and expense items are translated at average exchange rates for the period. The
effect of foreign exchange rate fluctuations did not significantly impact the
Company's operating results. Accumulated net translation adjustments are
reported in stockholders' equity, net of tax, as a component of accumulated
other comprehensive income. The associated tax benefit for cumulative
translation adjustments is $3.6 million, $2.2 million and $0.2 million in fiscal
2001, 2000 and 1999, respectively. For the one-month ended October 31, 1999, the
tax benefit for the cumulative translation was not material. Foreign exchange
transaction gains and losses were not material for all periods presented and are
included in the results of operations.

Foreign Exchange Contracts. The Company operates internationally and
therefore is exposed to potentially adverse movements in foreign currency rates.
The Company has entered into foreign exchange forward contracts to reduce its
exposure to foreign currency rate changes on non-functional currency denominated
balance sheet positions. The objective of these contracts is to neutralize the
impact of foreign currency rate movements on the Company's operating results.

Foreign exchange forward contracts require the Company to exchange
currencies at rates agreed upon at the inception of the contracts. These
contracts reduce the exposure to fluctuations in exchange rates because the
gains and losses associated with foreign currency balances and transactions are
generally offset with the gains and losses of the hedge contracts. Because the
impact of movements in currency exchange rates on forward contracts offsets the
related impact on the underlying items being hedged, these financial instruments
help alleviate the risk that might otherwise result from changes in currency
exchange rates.

These contracts contain credit risk in that the counterparty may be unable
to meet the terms of the agreements. The Company has limited these agreements to
major financial institutions to reduce such credit risk. Furthermore, the
Company monitors the potential risk of loss with any one financial institution
and does not expect any material loss as a result of default by the
counterparties.

Revenue Recognition and Cost of Revenue. Revenue consists of fees for
perpetual and time-based licenses of the Company's software products, sales of
hardware system products, post-contract customer support (PCS), customer
training and consulting. The Company classifies its revenues as product, service
or ratable license. Product revenue consists primarily of perpetual and
non-ratable time-based license revenue. Service revenue consists of PCS under
perpetual and non-ratable time-based licenses and consulting services. Ratable
license revenue is all fees related to time-based licenses bundled with
post-contract customer support (PCS) and sold as a single package (commonly
referred to by the Company as a Technology Subscription License or TSL) and
time-based licenses that include extended payment terms or unspecified
additional products.

Cost of product revenue includes cost of production personnel, product
packaging, documentation, amortization of capitalized software development
costs, and costs of the Company's systems products. Cost of service revenue
includes personnel and the related costs associated with providing training,
consulting and PCS. Cost of ratable license revenue includes the cost of
products and services related to time-based licenses bundled with PCS and sold
as a single package and to time-based licenses that include extended payment
terms or unspecified additional products.

The Company recognizes revenue in accordance with SOP 97-2, Software
Revenue Recognition, as amended by SOP 98-9 and SOP 98-4 and generally
recognizes revenue when all of the following criteria are met as set forth in
paragraph 8 of SOP 97-2:

- Persuasive evidence of an arrangement exists,

- Delivery has occurred,

43

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

- The vendor's fee is fixed or determinable, and

- Collectibility is probable.

The Company defines each of the four criteria above as follows:

Persuasive Evidence of an Arrangement Exists. It is the Company's
customary practice to have a written contract, which is signed by both the
customer and Synopsys, or a purchase order from those customers that have
previously negotiated a standard end-user license arrangement or volume
purchase agreement, prior to recognizing revenue on an arrangement.

Delivery Has Occurred. The Company's software may be either
physically or electronically delivered to its customers. For those products
that are delivered physically, the Company's standard transfer terms are
FOB shipping point. For an electronic delivery of software, delivery is
considered to have occurred when the customer has been provided with the
access codes that allow the customer to take immediate possession of the
software on its hardware.

If undelivered products or services exist in an arrangement that are
essential to the functionality of the delivered product, delivery is not
considered to have occurred.

The Vendor's Fee is Fixed or Determinable. The fee the Company's
customers pay for its products is negotiated at the outset of an
arrangement, and is generally based on the specific volume of product to be
delivered. The Company's license fees are not a function of
variable-pricing mechanisms such as the number of units distributed or
copied by the customer, or the expected number of users in an arrangement.
Therefore, except in cases where the Company grants extended payment terms
to a specific customer, the Company's fees are considered to be fixed or
determinable at the inception of the arrangements.

The Company's typical payment terms are such that a minimum of 75% of
the arrangement revenue is due within one year or less. Arrangements with
payment terms extending beyond the typical payment terms are not considered
to be fixed or determinable. Revenue from such arrangements is recognized
at the lesser of the aggregate of amounts due and payable or the amount of
the arrangement fee that would have been recognized if the fees had been
fixed or determinable.

Collectibility is Probable. Collectibility is assessed on a
customer-by-customer basis. The Company typically sells to customers for
which there is a history of successful collection. New customers are
subjected to a credit review process that evaluates the customers'
financial positions and ultimately their ability to pay. New customers are
typically assigned a credit limit based on a formulated review of their
financial position. Such credit limits are only increased after a
successful collection history with the customer has been established. If it
is determined from the outset of an arrangement that collectibility is not
probable based upon the Company's credit review process, revenue is
recognized on a cash-collected basis.

Multiple Element Arrangements. The Company allocates revenue on software
arrangements involving multiple elements to each element based on the relative
fair values of the elements. The Company's determination of fair value of each
element in multiple element arrangements is based on vendor-specific objective
evidence (VSOE). The Company limits its assessment of VSOE for each element to
the price charged when the same element is sold separately.

The Company has analyzed all of the elements included in its
multiple-element arrangements and determined that it has sufficient VSOE to
allocate revenue to the PCS components of its perpetual license products and
consulting. Accordingly, assuming all other revenue recognition criteria are
met, revenue from perpetual licenses is recognized upon delivery using the
residual method in accordance with SOP 98-9 and revenue from PCS is recognized
ratably over the PCS term. The Company recognizes revenue from TSLs

44

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

over the term of the ratable license period, as the license and PCS portions of
a TSL are bundled and not sold separately. Revenue from contracts with extended
payment terms is recognized as the lesser of amounts due and payable or the
amount of the arrangement fee that would have been recognized if the fee were
fixed or determinable.

Certain of the Company's time-based licenses include unspecified additional
products. The Company recognizes revenue from time-based licenses that include
both unspecified additional software products and extended payment terms that
are not considered to be fixed or determinable in an amount that is the lesser
of amounts due and payable or the ratable portion of the entire fee. Revenue
from contracts with unspecified additional software products is recognized
ratably over the contract term.

Consulting Services. The Company provides design methodology assistance,
specialized services relating to telecommunication systems design and
generalized turnkey design services. The Company's consulting services generally
are not essential to the functionality of the software. The Company's software
products are fully functional upon delivery and implementation does not require
any significant modification or alteration. The Company's services to its
customers often include assistance with product adoption and integration and
specialized design methodology assistance. Customers typically purchase these
professional services to facilitate the adoption of the Company's technology and
dedicate personnel to participate in the services being performed, but they may
also decide to use their own resources or appoint other professional service
organizations to provide these services. Software products are billed separately
and independently from consulting services, which are generally billed on a
time-and-materials or milestone-achieved basis. The Company generally recognizes
revenue from consulting services as the services are performed.

Exceptions to the general rule above involve arrangements where the Company
has committed to significantly alter the features and functionality of its
software or build complex interfaces necessary for the Company's software to
function in the customer's environment. These types of services are considered
to be essential to the functionality of the software. Accordingly, contract
accounting is applied to both the software and service elements included in
these arrangements.

Balance Sheet Deferred Revenue. As of October 31, 2001, approximately
$150.0 million of the deferred revenue balance relates to revenue which will be
recognized more than one year from the balance sheet date. As of October 31,
2000, all deferred revenue was recognized during the year ended October 31,
2001.

Property and Equipment. Property and equipment is recorded at cost.
Depreciation and amortization of assets is provided using the straight-line
method over the estimated useful life of the property or equipment ranging from
three to five years. Leasehold improvements are amortized using the
straight-line method over the remaining term of the lease or the economic useful
life of the asset whichever is shorter. The cost of repairs and maintenance is
charged to operations as incurred. A detail of property and equipment is as
follows:

45

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

Software Development Costs. Capitalization of software development costs
begins upon the establishment of technological feasibility, which is generally
the completion of a working prototype. Software development costs capitalized
were $1.0 million in fiscal 2001, $1.0 million in fiscal 2000, and $0.9 million
in fiscal 1999. Amortization of software development costs is computed based on
the straight-line method over the software's estimated economic life of
approximately two years. The Company recorded amortization of $1.0 million, $1.0
million, and $1.6 million in fiscal 2001, 2000 and 1999, respectively. For the
one month ended October 31, 1999, software development costs and the associated
amortization amounts were not material.

Intangible Assets. Intangible assets consist of purchased technology,
goodwill and goodwill-like assets such as assembled workforce. Goodwill
represents the excess of the aggregate purchase price over the fair value of the
tangible and identifiable intangible assets acquired by the Company. Intangible
assets are amortized on a straight-line basis over their estimated useful lives
which range from three to five years. Amortization of intangible assets charged
to operations amounted to $17.0 million, $15.1 million and $7.9 million in
fiscal 2001, 2000 and 1999, respectively, and, $1.2 million for the one month
ended October 31, 1999.

The Company periodically evaluates its intangible assets for indications of
impairment. If this evaluation indicates that the value of the intangible asset
may be impaired, an evaluation of the recoverability of the net carrying value
of the asset over its remaining useful life is made. If this evaluation
indicates that the intangible asset is not recoverable, based on the estimated
undiscounted future cash flows of the entity or technology acquired over the
remaining amortization period, the net carrying value of the related intangible
asset will be reduced to fair value and the remaining amortization period may be
adjusted. In fiscal 2001, the Company recognized an aggregate impairment charge
of $2.2 million to reduce the amount of certain intangible assets associated
with prior acquisitions to their estimated fair value. Approximately $1.8
million and $0.4 million is included in cost of revenues and amortization of
intangible assets, respectively, on the statement of operations. The impairment
charge is attributable to certain technology acquired from, and goodwill related
to the acquisition of Eagle Design Automation, Inc. in 1997. During the fourth
quarter of fiscal 2001, the Company determined that it would not allocate future
resources to assist in the market growth of this technology and the Company does
not anticipate any future sales of the product. There were no impairments of
intangible assets in fiscal 2000 and 1999 or in the one-month period ended
October 31, 1999.

Accounts Payable and Accrued Liabilities. Accounts payable and accrued
liabilities consist of:

Deferred Compensation Plan. The Company maintains a deferred compensation
plan (the Plan) which permits certain employees to defer up to 50% of their
annual cash base compensation or 100% of their annual cash variable
compensation. Distributions from the Plan are generally payable upon cessation
of employment in equal quarterly installments over five to 15 years or as a lump
sum payment, at the option of the employee. Undistributed amounts under the Plan
are subject to the claims of the Company's creditors. As of October 31, 2001 and
2000, the invested amounts under the Plan total $15.6 million and $14.2 million
respectively, and are recorded as a long-term asset on the Company's balance
sheet. As of October 31, 2001 and 2000, the Company has recorded $16.7 million
and $14.9 million, respectively, as a long-term liability to recognize
undistributed amounts due to employees.

46

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

Income Taxes. The Company accounts for income taxes using the asset and
liability method. Under the asset and liability method, deferred tax assets and
liabilities are recognized for the future tax consequences attributable to
differences between the financial statement carrying amounts of existing assets
and liabilities and their respective tax bases and operating loss and tax credit
carryforwards. Deferred tax assets and liabilities are measured using enacted
tax rates expected to apply to taxable income in the years in which those
temporary differences are expected to be recovered or settled. The effect on
deferred tax assets and liabilities of a change in tax rates is recognized in
income in the period that includes the enactment date.

Earnings per Share. Basic earnings per share is computed using the
weighted-average number of shares outstanding during the period. Diluted
earnings per share is computed using the weighted-average number of common
shares and dilutive stock options outstanding during the period. The
weighted-average dilutive stock options outstanding is computed using the
treasury stock method.

The following is a reconciliation of the weighted-average common shares
used to calculate basic net income per share to the weighted-average common
shares used to calculate diluted net income per share.

The effect of dilutive employee stock options excludes approximately
3,810,000, 12,999,000 and 630,000 stock options for fiscal 2001, 2000 and 1999,
respectively, which were anti-dilutive for earnings per share calculations.

Stock-Based Compensation. As permitted by Statement of Financial
Accounting Standards No. 123, Accounting for Stock-Based Compensation (SFAS
123), the Company has elected to use the intrinsic value method prescribed by
Accounting Principles Board Opinion No. 25, Accounting for Stock Issued to
Employees (APB 25), to measure compensation expense for stock-based awards to
employees.

Adoption of SFAS 133. On November 1, 2000, Synopsys adopted Statement of
Financial Accounting Standards No. 133, Accounting for Derivative Instruments
and Hedging Activities (SFAS 133), as amended. SFAS 133 establishes accounting
and reporting standards for derivative instruments and hedging activities and
requires that all derivatives be recognized as either assets or liabilities at
fair value. Derivatives that are not designated as hedging instruments are
adjusted to fair value through earnings. If the derivative is designated as a
hedging instrument, depending on the nature of the exposure being hedged,
changes in fair value will either be offset against the change in fair value of
the hedged asset, liability, or firm commitment through earnings, or recognized
in other comprehensive income until the hedged anticipated transaction affects
earnings. The ineffective portion of the hedge is recognized in earnings
immediately. Upon adoption of SFAS 133, the cumulative transition adjustment was
insignificant.

Adoption of SAB 101. In fiscal 2000, the Securities and Exchange
Commission issued Staff Accounting Bulletin No. 101, Revenue Recognition in
Financial Statements (SAB 101). The objective of SAB 101 is to provide further
guidance on revenue recognition issues in the absence of authoritative
literature addressing a specific arrangement or a specific industry. The Company
adopted the guidance in SAB 101 during the fourth quarter of fiscal 2001.
Adoption of this guidance did not have a material impact on the Company's
financial position or results of operations.

47

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

Reclassifications. Certain prior year amounts have been reclassified to
conform to current year presentation.

NOTE 3. BUSINESS COMBINATIONS AND DIVESTITURES

Pooling-of-Interests Combinations. In fiscal 2001 and 2000, the Company
did not account for any business combinations using the pooling-of-interests
method. In fiscal 1999, the Company issued approximately 1.4 million shares of
its common stock for all the outstanding stock of Everest Design Automation,
Inc. (Everest), a developer of integrated circuit routing and related technology
and reserved approximately 120,000 shares of its common stock for issuance under
Everest's stock option plan assumed in the transaction. The business combination
was accounted for as a pooling of interests, and accordingly, the Company's
consolidated financial statements have been restated to include the financial
position and results of Everest's operations for all periods prior to the merger
date. In the year ended September 30, 1999 and for the period preceding the
merger, Everest had a net loss of $0.8 million and Synopsys had net income of
$162.1 million. For the period preceding the merger, Everest did not have any
revenues.

In fiscal 1998, the Company recorded a charge for merger-related and other
costs in connection the merger with ViewLogic Systems, Inc. In the year ended
September 30, 1999 and the one-month period ended October 31, 1999, the Company
made aggregate payments of $3.4 million in final settlement of these
obligations.

Purchase Combinations. During fiscal 2000 and 1999, the Company made a
number of purchase acquisitions. Pro forma results of operations have not been
presented since the effects of the acquisitions were not material to the
Company's consolidated financial position, results of operations or cash flows
for the periods presented. The consolidated financial statements include the
operating results of each business from the date of acquisition. The purchase
price of each transaction was allocated to the acquired assets and liabilities
based on their estimated fair values as of the date of the respective
acquisitions. There were no purchase transactions during fiscal 2001.

The excess of the purchase price over the estimated value of the net
tangible assets acquired was allocated to various intangible assets, consisting
primarily of developed technology and goodwill, as well as goodwill-like assets
such as assembled workforce. The values assigned to developed technologies
related to each acquisition were based upon future discounted cash flows related
to the existing products' projected income streams. The values of the assembled
workforces were based upon the cost to replace those workforces. Amounts
allocated to developed technology, workforce and goodwill are being amortized on
a straight-line basis, generally over a period of three to five years. As
discussed in Note 10, in July 2001, the Financial Accounting Standards Board
issued Statements of Financial Accounting Standards No. 141, Business
Combinations and No. 142, Goodwill and Other Intangible Assets. Upon full
adoption of these new standards the Company may be required to make
reclassifications of certain of its intangible assets to present goodwill
separately and will discontinue amortization of goodwill and all intangible
assets with indefinite lives.

The amounts allocated to purchased in-process research and development were
determined through established valuation techniques in the high-technology
industry and were expensed upon acquisition because technological feasibility
had not been established and no future alternative uses existed. Research and
development costs to bring the products from the acquired companies to
technological feasibility are not expected to have a material impact on the
Company's future results of operations or cash flows.

In fiscal 2000, the Company acquired VirSim, a software product, from
Innoveda, Inc.; The Silicon Group, Inc. (TSG), a privately held provider of
integrated circuit design and intellectual property integration services; and
Leda S.A. (Leda), a privately held provider of RTL coding-style-checkers.

In fiscal 1999, the Company acquired Gambit Automated Design, Inc.
(Gambit), a privately held developer of place and route software and provider of
physical design services; Stanza Systems, Inc. (Stanza),
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SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

a privately held company with physical layout editor expertise and technology;
Smartech OY (Smartech), a privately held design services firm with expertise in
the design of wireless communication devices; the rights to CoverMeter, a
Verilog code coverage tool, from Advanced Technology Center of Massachusetts and
Apteq, Inc. (Apteq), which was conducting research and development on extensions
to the Verilog language.

A summary of the Company's purchase transactions during fiscal 2000 and
1999 is included in the following table.

Divestitures. In January 2001, the Company sold the assets of its silicon
libraries business to Artisan Components, Inc. ("Artisan") for a total sales
price of $15.5 million, including common stock with a fair value of $11.4
million on the date of sale, and cash of $4.1 million. The net book value of the
assets sold was $1.4 million. Expenses incurred in connection with the sale were
$3.5 million. The Company recorded a gain on the sale of the business of $10.6
million, which is included in other income, net. Direct revenue for the silicon
libraries business was $0.2 million, $4.3 million and $10.1 million in fiscal
2001, 2000 and 1999, respectively.

49

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

NOTE 4. FINANCIAL INSTRUMENTS

Cash, Cash Equivalents and Investments. All cash equivalents, short-term
investments, and non-current investments have been classified as
available-for-sale securities and are detailed as follows:

Short-term investments include tax-exempt municipal obligations, which may
have underlying maturities of more than one year. However, such investments may
have put options or reset dates within three years that meet high credit quality
standards as specified in the Company's investment policy. At October 31, 2001,
the underlying maturities of the Company's investments are $8.1 million within
one year, $82.4 million within one to five years, $7.6 million within five to
ten years and $106.6 million after ten years. These investments are generally
classified as available for sale, and are recorded on the balance sheet at fair
market value with unrealized gains or losses reported as a separate component of
accumulated other comprehensive income, net of tax. Realized gains and losses on
sales of short-term investments have not been material.

Strategic Investments. The Company's strategic investment portfolio
consists of minority equity investments in publicly traded companies and
investments in privately held companies, many of which can still be considered
in the start-up or development stages. The securities of publicly traded
companies are generally classified as available-for-sale securities accounted
for under Statement of Financial Accounting Standards

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SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

No. 115, Accounting for Certain Investments in Debt and Equity Securities (SFAS
115), and are reported at fair value, with unrealized gains or losses, net of
tax, recorded as a component of other comprehensive income in stockholders'
equity. The cost of securities sold is based on the specific identification
method. The securities of privately held companies are reported at the lower of
cost or fair value.

During the year ended October 31, 2001, the Company determined that certain
of the assets held in the Company's venture fund, with an aggregate value of
$9.4 million, were impaired, and that the impairment was other than temporary.
Accordingly, the Company recorded a charge of approximately $5.8 million to
write down the carrying value of the investments. The impairment charge is
included in other income, net. The impairment charge relates to certain
investments in non-public companies and represents management's estimate of the
impairment incurred during the period as a result of specific analysis of each
investment, considering the activities of and events occurring at each of the
underlying portfolio companies during the quarter. The Company's portfolio
companies operate in industries that are rapidly evolving and extremely
competitive. For equity investments in non-public companies for which there is
not a market in which their value is readily determinable, the Company reviews
each investment for indicators of impairment on a quarterly basis based,
primarily on achievement of business plan objectives and current market
conditions, among other factors. The primary business plan objectives the
Company considers include, among others, those related to financial performance
such as achievement of planned financial results or completion of capital
raising activities, and those that are not primarily financial in nature such as
the introduction of technology or the hiring of key employees on a timely basis.
If it is determined that an impairment has occurred with respect to an
investment in a portfolio company, in the absence of quantitative valuation
metrics, management estimates the impairment and/or the net realizable value of
the portfolio investment based on public- and private-company market comparable
information and valuations completed for companies similar to Synopsys'
portfolio companies.

The Chairman of the Company's Audit Committee is also the Chairman of the
Board of Directors for a company in which Synopsys has invested $500,000.

Derivative Financial Instruments. Available-for-sale equity investments
accounted for under SFAS 115 are subject to market price risk. From time to
time, the Company enters into and designates forward contracts to hedge variable
cash flows from anticipated sales of these investments. In accounting for a
derivative designated as a cash flow hedge, the effective portion of the change
in fair value of the derivative is initially recorded in other comprehensive
income and reclassified into earnings when the hedged anticipated transaction
affects earnings. The ineffective portion of the change in the fair value of the
derivative is recognized in earnings immediately.

The Company's objective for entering into derivative contracts is to lock
in the price of selected equity holdings while maintaining the rights and
benefits of ownership until the anticipated sale occurs. The forecasted sale
selected for hedging is determined by market conditions, up-front costs, and
other relevant factors. The Company has generally selected forward sale
contracts to hedge its market price risk.

Changes in the spot rate of the forward sale contracts designated and
qualifying as cash flow hedges of the forecasted sale of available-for-sale
investments accounted for under SFAS 115 are reported in other comprehensive
income. The notional amount of the forward designated as the hedging instrument
is equal to the available-for-sale securities being hedged. In addition, hedge
effectiveness is assessed based on the changes in spot prices. As such, the
hedging relationship is perfectly effective, both at inception of the hedge and
on an on-going basis. The difference between the contract price and the forward
price, which is generally not material, is reflected in other income.

The Company has entered into forward sale contracts in fiscal 2001 and 2000
with a major financial institution for the sale through August 16, 2002 of
certain of the Company's strategic investments. During fiscal 2001, the Company
physically settled certain forward contracts. The net gain on the forward
contracts

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NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

was offset by the net loss on the related available-for-sale investment since
inception of the hedge, with any gain or loss reclassified from other
comprehensive income to other income. As of October 31, 2001, the Company has
forward sale contracts outstanding for 50,000 shares of Cadence Design Systems,
Inc. stock, 70,191 shares of Broadcom Corporation stock, 110,404 shares of
Nvidia Corporation stock and 121,688 shares of Numerical Technologies Inc. stock
at forward prices of $27.6383, $243.71, $40.378 and $22.6171, respectively. As
of October 31, 2001, the excess of the fair market value of the forward sale
price over cost has been recorded in stockholders' equity as a component of
accumulated other comprehensive income.

In fiscal 2001, the Company recorded a net realized gain on the sale of the
available-for-sale investments of $55.3 million (net of premium amortization).
As of October 31, 2001, the Company has recorded a liability of $0.3 million due
to unrealized losses on forward contracts. As of October 31, 2001, the Company
has recorded $17.3 million in long-term investments due to locked-in unrealized
gains on the available-for-sale investments. As of October 31, 2001, the maximum
length of time over which the Company is hedging its exposure to the variability
in future cash flows associated with the forward sale contracts is 10 months.

Foreign Exchange Hedging. The Company conducts business on a global basis.
Consequently, the Company enters into foreign exchange forward contracts to
reduce the impact of certain currency exposures. As of October 31, 2001, the
Company had $72.2 million of short-term foreign exchange forward contracts
outstanding which approximated the fair value of such contracts and their
underlying transactions. These contracts are denominated primarily in the Euro,
Japanese yen, Taiwan dollar, and British pound sterling. The outstanding forward
contracts have maturities that expire in approximately one month from the
balance sheet date. The foreign currency gains and losses on forward exchange
contracts and their underlying transactions resulting from market adjustments
are included in earnings. Gains and losses related to these instruments for the
fiscal year ended October 31, 2001 were not material.

Reclassification Adjustment Included in Other Comprehensive Income. Other
comprehensive income includes a reclassification adjustment related to
unrealized gains on investments, accumulated net translation adjustments and
unrealized gains on investments. In fiscal 2001, 2000 and 1999, the
reclassification adjustment is $33.7 million, $8.9 million and $9.5 million,
respectively. The reclassification amount adjusts other comprehensive income for
gains on the sale of available-for-sale securities realized during the current
year and included in other comprehensive income as unrealized holding gains in
the period in which such unrealized gains arose. The reclassification adjustment
is net of income tax expense of $21.6 million, $6.0 million and $5.6 million,
respectively, in fiscal 2001, 2000 and 1999.

Debt. During fiscal 2000, the Company entered into an equipment lease
agreement with a total lease obligation of $0.8 million, of which approximately
$0.1 million and $0.3 million was included in long-term debt as of October 31,
2001 and 2000, respectively. As of October 31, 2001 and 2000, the Company has
notes payable totaling $0.3 million and $6.1 million related to past
acquisitions that are payable through April 2002. The fair value of the
Company's long-term debt approximates the carrying amount.

NOTE 5. COMMITMENTS AND CONTINGENCIES

The Company leases its domestic and international facilities and certain
office equipment under operating leases. Rent expense was $30.0 million, $29.1
million and $23.5 million in fiscal 2001, 2000 and 1999, respectively. During
December 2000, the Company entered into a sublease agreement for a portion of
its office space through May 2003. Monthly lease payments of $76,000 began on
December 1, 2000.

In July 2001, the Company amended certain non-cancelable leases related to
its corporate office facilities. The leases, originally scheduled to expire in
February 2003 have been extended to February 2015. Monthly lease payments are
approximately $0.8 million per month in the first year of the extended term
escalating to $1.1 million per month in the last year of the extended term.

52

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

Future minimum lease payments on all facility operating leases (net of
sublease income) as of October 31, 2001 are as follows:

NOTE 6. STOCKHOLDERS' EQUITY

Stock Repurchase Programs. In July 2001, July 2000 and June 1999, the
Company's Board of Directors authorized stock repurchase programs under which
Synopsys common stock with a market value up to $500 million, $500 million and
$200 million, respectively, may be acquired in the open market. In each case,
the authorized stock repurchase program replaced all prior repurchase programs
authorized by the Board. Common shares repurchased are intended to be used for
ongoing stock issuances under the Company's employee stock plans and for other
corporate purposes. The July 2001 stock repurchase program expires on October
31, 2002. During fiscal 2001, 2000 and 1999, the Company purchased 6.6 million
shares at an average price of $50.00 per share, 9.9 million shares at an average
price of $40.02 per share, and 1.7 million shares at an average price of $56.26,
respectively, under all share repurchase programs. At October 31, 2001,
approximately $481.9 million remained available for repurchases under the July
2001 program.

Preferred Shares Rights Plan. The Company has adopted a number of
provisions that could have anti-takeover effects, including a Preferred Shares
Rights Plan. In addition, the Board of Directors has the authority, without
further action by its shareholders, to fix the rights and preferences and issue
shares of authorized but undesignated shares of Preferred Stock. This provision
and other provisions of the Company's Restated Certificate of Incorporation and
Bylaws and the Delaware General Corporation Law may have the effect of deterring
hostile takeovers or delaying or preventing changes in control or management of
the Company, including transactions in which the stockholders of the Company
might otherwise receive a premium for their shares over then current market
prices. The preferred share rights expire on October 24, 2007.

Employee Stock Purchase Plan. Under the Company's 1992 Employee Stock
Purchase Plan (ESPP) 7,050,000 shares have been authorized for issuance as of
October 31, 2001. Under the ESPP, employees are granted the right to purchase
shares of common stock at a price per share that is 85% of the lesser of the
fair market value of the shares at (i) the beginning of a rolling two-year
offering period, or (ii) the end of each semi-annual purchase period. During
fiscal 2001, 2000, the one-month ended October 31, 1999 and fiscal 1999 shares
totaling 567,254, 512,988, 225,347 and 460,438, respectively, were issued under
the plan at average per share prices of $33.20, $32.63, $39.30, and $31.73,
respectively. As of October 31, 2001, 3,513,224 shares of common stock were
reserved for future issuance under the ESPP.

Stock Option Plans. Under the Company's 1992 Stock Option Plan (the 1992
Plan), 17,591,624 shares of common stock have been authorized for issuance.
Pursuant to the 1992 Plan, the Board of Directors may grant either incentive or
non-qualified stock options to purchase shares of the Company's common stock to

53

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

eligible individuals at not less than 100% of the fair market value of those
shares on the grant date. Stock options generally vest over a period of four
years and expire ten years from the date of grant. As of October 31, 2001,
1,915,451 shares of common stock are reserved for future grants under the 1992
Plan.

Under the Company's Non-Statutory Stock Option Plan (the 1998 Plan),
24,073,534 shares of common stock have been authorized for issuance. Pursuant to
the 1998 Plan, the Board of Directors may grant non-qualified stock options to
employees, excluding executive officers. Exercisability, option price and other
terms are determined by the Board of Directors, but the option price shall not
be less than 100% of the fair market value of the stock at the grant date. Stock
options generally vest over a period of four years and expire ten years from the
date of grant. At October 31, 2001, 4,343,282 shares of common stock were
reserved for future grants.

Under the Company's 1994 Non-Employee Directors Stock Option Plan (the
Directors Plan), a total of 600,000 shares have been authorized for issuance.
The Directors Plan provides for automatic grants to each non-employee member of
the Board of Directors upon initial appointment or election to the Board,
reelection and for annual service on Board committees. Stock options are granted
at not less than 100% of the fair market value of those shares on the grant
date. Stock options granted upon appointment or election to the Board vest 25%
annually. Stock options granted upon reelection to the Board and for committee
service vest 100% after the first year of continuous service. As of October 31,
2001, 41,839 shares of common stock were reserved for future grants.

The Company has assumed certain option plans in connection with business
combinations. Generally, these options were granted under terms similar to the
terms of the Company's stock option plans at prices adjusted to reflect the
relative exchange ratios. All assumed plans were terminated as to future grants
upon completion of each of the business combinations.

54

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

Additional information concerning stock option activity under all plans is
as follows:

The following table summarizes information about stock options outstanding
at October 31, 2001:

Stock-Based Compensation. In accordance with APB 25, the Company applies
the intrinsic value method in accounting for employee stock options.
Accordingly, the Company generally recognizes no

55

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

compensation expense with respect to stock-based awards to employees. The
Company has determined pro forma information regarding net income and earnings
per share as if the Company had accounted for employee stock options under the
fair value method as required by SFAS No. 123. The fair value of these
stock-based awards to employees was estimated using the Black-Scholes option
pricing model, assuming no expected dividends and using the following
weighted-average assumptions:

For pro forma purposes, the estimated fair value of the Company's
stock-based awards to employees is amortized over the options' vesting period of
four years and the ESPP's six-month purchase period. The weighted-average
estimated fair value of stock options issued during fiscal 2001, 2000 and 1999
was $25.62, $15.96 and $22.88 per share, respectively. The weighted-average
estimated fair value of share purchase rights under the ESPP during fiscal 2001,
2000 and 1999 was $16.57, $14.32 and $13.76 per share, respectively. The
Company's pro forma net income and earnings per share data under SFAS No. 123 is
as follows:

NOTE 7. INCOME TAXES

The Company is entitled to a deduction for federal and state tax purposes
with respect to employees' stock option activity. The net reduction in taxes
otherwise payable arising from that deduction has been credited to additional
paid-in capital.

56

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

The components of the Company's total income before provision for income
taxes are as follows:

The components of the provision (benefit) for income taxes are as follows:

57

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

The provision for income taxes differs from the amount obtained by applying
the statutory federal income tax rate to income (loss) before income taxes as
follows:

58

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

A net deferred tax asset of $170.4 million and $85.8 million is recorded at
October 31, 2001 and 2000, respectively. The tax effects of temporary
differences and carryforwards, which give rise to significant portions of the
deferred tax assets and liabilities, are as follows:

At October 31, 2001, the Company believes that it is more likely than not
that the results of future operations will generate sufficient taxable income to
realize the deferred tax assets.

The Company's United States income tax returns for fiscal years ended
September 30, 1996 and September 30, 1995 are under examination and the Internal
Revenue Service has proposed certain adjustments. Management believes that
adequate amounts have been provided for any adjustments that may ultimately
result from these examinations.

59

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

The Company has federal tax loss carryforwards of approximately $32.7
million at October 31, 2001. The loss carryforwards will expire in 2009 through
2019. Because of the change in ownership provisions of the Internal Revenue
Code, a portion of the Company's loss carryforwards may be subject to annual
limitations. The annual limitation may result in the expiration of the net
operating loss before utilization. The Company also has net operating loss
carryforwards from Ireland operations of approximately $83.7 million. These loss
carryforwards will expire in 2005 through 2006. Management believes that all net
operating losses will be utilized and a valuation allowance is not necessary.

NOTE 8. SEGMENT DISCLOSURE

Statement of Financial Accounting Standards No. 131, Disclosures about
Segments of an Enterprise and Related Information (SFAS 131), requires
disclosures of certain information regarding operating segments, products and
services, geographic areas of operation and major customers. The method for
determining what information to report under SFAS 131 is based upon the
"management approach," or the way that management organizes the operating
segments within a company, for which separate financial information is available
that is evaluated regularly by the Chief Operating Decision Maker (CODM) in
deciding how to allocate resources and in assessing performance. Synopsys' CODM
is the Chief Executive Officer and Chief Operating Officer.

The Company provides comprehensive design technology products and
consulting services in the electronic design automation software industry. The
CODM evaluates the performance of the Company based on profit or loss from
operations before income taxes not including merger-related costs, in-process
research and development and amortization of intangible assets. For the purpose
of making operating decisions, the CODM primarily considers financial
information presented on a consolidated basis accompanied by disaggregated
information about revenues by geographic region. There are no differences
between the accounting policies used to measure profit and loss for the Company
segment and those used on a consolidated basis. Revenue is defined as revenues
from external customers.

The disaggregated financial information reviewed by the CODM is as follows:

The CODM did not review disaggregated financial information for the
one-month ended October 31, 1999.

60

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

Reconciliation of the Company's segment profit and loss to the Company's
operating income is as follows:

Revenue and long-lived assets related to operations in United States and
other geographic areas are as follows:

Geographic revenue data for multi-region, multi-product transactions
reflects internal allocations and is therefore subject to certain assumptions
and the Company's methodology. Revenue is not reallocated among geographic
regions to reflect any re-mixing of licenses between different regions following
the initial product shipment. No one customer accounted for more than ten
percent of the Company's consolidated revenue in the periods presented.

During the fourth quarter of fiscal 2000, the Company began segregating
revenue into five categories for purposes of internal management reporting: IC
Implementation, including both the Design Compiler (DC) Family and Physical
Synthesis; Verification and Test; Intellectual Property (IP) and System Level

61

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

Design; Transistor Level Design (TLD); and Professional Services. Revenues for
each of the categories for the fiscal years 2001, 2000 and 1999 are as follows:

NOTE 9. PROPOSED ACQUISITION OF IKOS SYSTEMS, INC.

On July 2, 2001, Synopsys entered into an Agreement and Plan of Merger and
Reorganization (the "Merger Agreement") with IKOS Systems, Inc. (IKOS). The
Merger Agreement provides for the acquisition of all outstanding shares of IKOS
common stock by Synopsys. The merger is expected to be completed in August 2002,
however, under certain circumstances the merger may close prior to June 30,
2002. We will account for the merger under the purchase method of accounting.

Upon completion of the merger, holders of IKOS common stock will be
entitled to receive Synopsys common stock with a value between $6 and $20 in
exchange for each share of IKOS common stock owned at the time of completion of
the merger. The exact amount per share will depend upon the financial
performance of IKOS during the 12-month measurement period ending June 30, 2002
and will be calculated based on formulas contained in the Merger Agreement. The
formulas contained in the Merger Agreement provide for proportionate increases
in the purchase price per IKOS share as IKOS' revenue, revenue plus change in
backlog or profit (loss) before tax (PBT) (each as defined in the Merger
Agreement) increase. If the merger closes before June 30, 2002, the Merger
Agreement provides for holders of IKOS common stock on the closing date to
receive Synopsys common stock with a value of $15 for each share of IKOS common
stock, regardless of IKOS' financial performance up to the date of closing.
Regardless of when the merger closes, the purchase price per IKOS share is
subject to reduction if the number of outstanding IKOS shares and options
immediately before the effective time of the merger exceeds an agreed-upon
level. However, the purchase price per IKOS share will not be less than $6.

The merger is subject to certain conditions, including IKOS achieving
revenue of at least $50 million and losses before tax not exceeding $10 million
during the twelve-month period ending June 30, 2002, expiration or termination
of a Synopsys emulation non-compete agreement, IKOS stockholder approval,
retention of certain employees, compliance with regulatory requirements and
customary closing conditions.

The actual number of shares of Synopsys common stock to be issued in the
merger and the aggregate purchase price at the effective time of the merger
cannot be determined until IKOS' financial performance during the measurement
period is calculated and until the average last sale price of Synopsys common
stock during the applicable pre-closing pricing period is determined.

On December 7, 2001, Mentor Graphics Corporation commenced a tender offer
for all shares of IKOS common stock. The offer is subject to numerous
conditions, including the termination of the Merger

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SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

Agreement. The purported terms and conditions of the offer are set forth in an
offer to purchase filed by Mentor as part of a Schedule TO with the Securities
and Exchange Commission on December 7, 2001 and in certain amendments thereto
filed by Mentor with the SEC thereafter. IKOS' response to the tender offer is
set forth in a Schedule 14D-9 filed by IKOS with the Securities and Exchange
Commission on December 20, 2001 and in certain amendments thereto filed by IKOS
with the SEC thereafter. Litigation relating to IKOS is discussed above under
Item 3.

10. EFFECT OF NEW ACCOUNTING STANDARDS

In July 2001, the Financial Accounting Standards Board issued Statements of
Financial Accounting Standards No. 141, Business Combinations, (SFAS 141) and
No. 142, Goodwill and Other Intangible Assets (SFAS 142). SFAS 141 requires that
the purchase method of accounting be used for all business combinations
initiated after June 30, 2001 and specifies criteria intangible assets acquired
in a purchase method business combination must meet to be recognized apart from
goodwill. SFAS 142 requires that goodwill and intangible assets with indefinite
useful lives no longer be amortized, but instead be tested for impairment at
least annually in accordance with the provisions of SFAS 142.

The Company is required to adopt the provisions of SFAS 141 immediately.
Under SFAS 141, goodwill and intangible assets determined to have indefinite
useful lives acquired in a purchase business combination completed after June
30, 2001, but before SFAS 142 is adopted will not be amortized, but will
continue to be evaluated for impairment in accordance with Statement of
Financial Accounting Standards No. 121, Accounting for the Impairment of
Long-Lived Assets and for Long-Lived Assets to be Disposed Of. Goodwill and
intangible assets acquired in business combinations completed before July 1,
2001 will continue to be amortized and tested for impairment in accordance with
current accounting guidance until the date of adoption of SFAS 142.

Upon adoption of SFAS 142, SFAS 141 requires that the Company evaluate its
existing intangible assets and goodwill that were acquired in prior purchase
business combinations, and make any necessary reclassifications in order to
conform with the new criteria in SFAS 141 for recognition apart from goodwill.
Upon adoption of SFAS 142, the Company will be required to reassess the useful
lives and residual values of all intangible assets acquired, and make any
necessary amortization period adjustments. In addition, the Company will be
required to test intangible assets with indefinite useful lives and goodwill for
impairment in accordance with the provisions of SFAS 142 within the six-month
period following adoption. Any impairment loss will be measured as of the date
of adoption and recognized immediately as the cumulative effect of a change in
accounting principle. Any subsequent impairment losses will be included in
operating activities.

The Company expects to adopt SFAS 142 on November 1, 2002. As of October
31, 2001, unamortized goodwill is $35.1 million which, in accordance with the
Statements, will continue to be amortized until the date of adoption of SFAS
142. Related amortization expense for fiscal 2001, 2000 and 1999 is $17.0
million, $15.1 million and $7.9 million, respectively. Amortization expense for
the one-month period ended October 31, 1999 was $1.2 million. Because of the
extensive effort needed to comply with adopting SFAS 141 and 142, it is not
practicable to reasonably estimate the impact of adopting these Statements on
the Company's financial statements at the date of this report, including whether
the Company will be required to recognize any transitional impairment losses.

NOTE 11. SUBSEQUENT EVENT

PROPOSED ACQUISITION OF AVANT! CORPORATION

On December 3, 2001, Synopsys entered into an Agreement and Plan of Merger
with Avant! Corporation (Avant!) by which Avant! will merge with and into a
wholly owned subsidiary of Synopsys. Synopsys will account for the merger under
the purchase method of accounting.

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SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

Upon completion of the merger, holders of Avant! common stock will be
entitled to receive 0.371 of a share of Synopsys common stock (including the
associated preferred stock rights) in exchange for each share of Avant! common
stock (the exchange ratio) owned at the time of completion of the merger. The
exchange ratio will be proportionately adjusted for any stock split, stock
dividend, reorganization or similar change in Avant! common stock or Synopsys
common stock. Avant! stockholders will receive cash based on the market price of
Synopsys common stock in lieu of any fractional shares to which they might
otherwise be entitled. The merger is subject to certain conditions, including
approval by the Avant! stockholders of the merger and the Agreement and Plan of
Merger, approval by Synopsys stockholders of the issuance of Synopsys common
stock in the merger, compliance with regulatory requirements and customary
closing conditions.

The actual number of shares of Synopsys common stock to be issued in the
proposed merger and the dollar value at the effective time of the merger cannot
be determined until the closing date of the merger.

64

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

NOTE 12. SELECTED QUARTERLY DATA (UNAUDITED)

65

SYNOPSYS, INC.

NOTES TO CONSOLIDATED FINANCIAL STATEMENTS -- (CONTINUED)

- ---------------

(1) The Company's common stock is traded on The Nasdaq Stock Market under the
symbol "SNPS." The stock prices shown represent quotations among dealers
without adjustments for retail markups, markdowns or commissions and may not
represent actual transactions. As of October 31, 2001, there were
approximately 526 shareholders of record. To date, the Company has paid no
cash dividends on its capital stock, and has no current intention to do so.

(2) During the fourth quarter of fiscal 2001, the Company changed its allocation
methodology for cost of sales. Total cost of sales remained unchanged. Prior
quarter balances have been reclassified to reflect this change in
methodology.

66

ITEM 9. CHANGES IN AND DISAGREEMENTS WITH ACCOUNTANTS ON ACCOUNTING AND
FINANCIAL DISCLOSURE

Not applicable.

PART III

ITEM 10. DIRECTORS AND EXECUTIVE OFFICERS OF THE REGISTRANT

Information with respect to directors of the Company will be included under
the caption "Additional Matters to be Considered at the Synopsys Annual
Meeting -- Proposal 2 -- Election of Synopsys Directors" in Synopsys' Notice of
Annual Meeting and Joint Proxy Statement/Prospectus for Synopsys' 2002 Annual
Meeting of Stockholders, which joint proxy statement/prospectus is expected to
be mailed to Synopsys stockholders within 120 days after the end of Synopsys'
fiscal year ended November 3, 2001 and which information shall be incorporated
herein by reference. Information with respect to Executive Officers is included
under the heading "Executive Officers of the Company" in Part I hereof after
Item 4.

Information regarding delinquent filers pursuant to Item 405 of Regulation
S-K will be included under the heading "Additional Matters to be Considered at
the Synopsys Annual Meeting -- Additional Information-Section 16(a) Beneficial
Ownership Reporting Compliance" in the joint proxy statement/prospectus, which
information shall be incorporated herein by reference.

ITEM 11. EXECUTIVE COMPENSATION

The information required by this item will be included under the heading
"Additional Matters to be Considered at the Synopsys Annual Meeting -- Executive
Compensation" in the joint proxy statement/prospectus, which information shall
be incorporated herein by reference.

ITEM 12. SECURITY OWNERSHIP OF CERTAIN BENEFICIAL OWNERS AND MANAGEMENT

The information required by this item will be included under the heading
"Ownership of Capital Stock of Synopsys and Avant! -- Security Ownership of
Certain Beneficial Owners and Management of Synopsys" in the joint proxy
statement/prospectus, which information shall be incorporated herein by
reference.

ITEM 13. CERTAIN RELATIONSHIPS AND RELATED TRANSACTIONS

The information required by this item will be included under the heading
"Additional Matters to be Considered at the Synopsys Annual Meeting -- Proposal
2 -- Election of Synopsys-Directors' Compensation" in the joint proxy
statement/prospectus, which information shall be incorporated herein by
reference.

PART IV

ITEM 14. EXHIBITS, FINANCIAL STATEMENTS, SCHEDULES AND REPORTS ON FORM 8-K

(a) The following documents are filed as part of this Annual Report on Form
10-K:

(1) Financial Statements

The following documents are included as Part II, Item 8, of this
Annual Report on Form 10-K:

67

(2) Financial Statement Schedule

The following schedule of the Company is included herein:

Valuation and Qualifying Accounts and Reserves (Schedule II)

All other schedules are omitted because they are not applicable or the
amounts are immaterial or the required information is presented in the
consolidated financial statements or notes thereto.

The following documents are included in Exhibit 23 hereto:

Exhibit 23.1 Report on Financial Statement Schedule

Exhibit 23.2 Consent of KPMG LLP, Independent Auditors

(3) Exhibits

See Item 14(c) below.

(b) Reports on Form 8-K

None.

(c) Exhibits

- ---------------

(1) Incorporated by reference to Annex A to the form of prospectus contained in
the Registration Statement on Form S-4 (File No. 333-39713) of Synopsys,
Inc. as filed with the Securities and Exchange Commission on November 7,
1997

(2) Incorporated by reference from exhibit to Current Report on Form 8-K as
filed with the Securities and Exchange Commission on December 5, 2001.

(3) Incorporated by reference from exhibit to the Company's Quarterly Report on
Form 10-Q for the quarterly period ended April 3, 1999

(4) Incorporated by reference from exhibit to Amendment No. 1 to the Company's
Registration Statement on Form 8-A as filed with the Securities and
Exchange Commission on December 13, 1999

(5) Incorporated by reference from exhibit of the same number filed with the
Company's Registration Statement on Form S-1 (File No. 33-45138) which
became effective February 24, 1992

(6) Incorporated by reference from exhibit of the same number filed with the
Company's Annual Report on Form 10-K for the fiscal year ended September
30, 1992

(7) Incorporated by reference from exhibit of the same number filed with the
Company's Annual Report on Form 10-K for the fiscal year ended September
30, 1993

(8) Incorporated by reference from exhibit of the same number filed with the
Company's Annual Report on Form 10-K for the fiscal year ended September
30, 1995

(9) Incorporated by reference from exhibit of the same number filed with the
Company's Quarterly Report on Form 10-Q for the quarterly period ended
December 31, 1995

69

(10) Incorporated by reference from exhibit of the same number filed with the
Company's Quarterly Report on Form 10-Q for the quarterly period ended
March 31, 1996

(11) Incorporated by reference from exhibit to the Company's Quarterly Report on
Form 10-Q for the quarterly period ended April 30, 2000, as filed with the
Securities and Exchange Commission on June 13, 2000

(12) Compensatory plan or agreement in which an executive officer or director
participates

(13) Incorporated by reference from exhibit to the Company's Quarterly Report on
Form 10-Q for the quarterly period ended April 30, 2001.

(14) Incorporated by reference from exhibit to the Registration Statement on
Form S-4 (File No. 333-21129) of Synopsys, Inc. as filed with the
Securities and Exchange Commission on February 5, 1997

(15) Incorporated by reference from exhibit to the Company's Registration
Statement on Form S-8 (file No. 333-77597), as filed with the Securities
and Exchange Commission on May 3, 1999

(16) Incorporated by reference from exhibit to the Company's Quarterly Report on
Form 10-Q for the quarterly period ended January 3, 1998

(17) Incorporated by reference to exhibit to the Company's Registration
Statement on Form S-8 (File No. 333-90643) as filed with the Securities and
Exchange Commission on November 9, 1999

70

SIGNATURES

Pursuant to the requirements of section 13 or 15(d) of the Securities
Exchange Act of 1934, the registrant has duly caused this report to be signed on
its behalf by the undersigned, thereunto duly authorized, in Mountain View,
State of California, on this 25 day of January, 2002.

SYNOPSYS, INC.

By: /s/ AART J. DE GEUS
------------------------------------
Aart J. de Geus
Chief Executive Officer and Chairman
of the Board of Directors
(Principal Executive Officer)

By: /s/ ROBERT B. HENSKE
------------------------------------
Robert B. Henske
Senior Vice President, Finance and
Operations, and Chief Financial
Officer
(Principal Financial Officer)

By: /s/ RICHARD T. ROWLEY
------------------------------------
Richard T. Rowley
Vice President, Corporate Controller
(Principal Accounting Officer)

POWER OF ATTORNEY

KNOW ALL PERSONS BY THESE PRESENTS, that each person whose signature
appears below constitutes and appoints Aart J. de Geus and Robert B. Henske, and
each of them, as his true and lawful attorneys-in-fact and agents, with full
power of substitution and resubstitution, for him and in his name, place and
stead, in any and all capacities, to sign any and all amendments (including
post-effective amendments) to this Report on Form 10-K, and to file the same,
with all exhibits thereto, and other documents in connection therewith, with the
Securities and Exchange Commission, granting unto said attorneys-in-fact and
agents, and each of them, full power and authority to do and perform each and
every act and thing requisite and necessary to be done in connection therewith,
as fully to all intents and purposes as he might or could do in person, hereby
ratifying and confirming all that said attorneys-in-fact and agents, or any of
them, or their or his substitute or substitutes, may lawfully do or cause to be
done by virtue hereof. Pursuant to the requirements of

71

the Securities Exchange Act of 1934, this report has been signed below by the
following persons on behalf of the registrant and in the capacities and on the
dates indicated:

72

SCHEDULE II

SYNOPSYS, INC.

VALUATION AND QUALIFYING ACCOUNTS AND RESERVES

- ---------------

(1) Accounts written off, net of recoveries.

73

EXHIBIT INDEX